6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-01 00:33:09 +00:00
Code Issues Projects Releases Wiki Activity

Add v4f64 -> v2f32 fp_round support. Also add a testcase to exercise

Browse Source 
the legalizer. This commit together with the two previous ones fixes
PR10495.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136654 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bruno Cardoso Lopes 2011-08-01 21:54:09 +00:00
parent aed890bee0
commit 55244ceac4
3 changed files with 14 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
lib/Target/X86/X86ISelLowering.cpp
View File

@ -966,6 +966,7 @@ X86TargetLowering::X86TargetLowering(X86TargetMachine &TM)
setOperationAction(ISD::FP_TO_SINT, MVT::v8i32, Legal);
setOperationAction(ISD::SINT_TO_FP, MVT::v8i32, Legal);
setOperationAction(ISD::FP_ROUND, MVT::v4f32, Legal);
setOperationAction(ISD::CONCAT_VECTORS, MVT::v4f64, Custom);
setOperationAction(ISD::CONCAT_VECTORS, MVT::v4i64, Custom);

6
lib/Target/X86/X86InstrSSE.td
View File

@ -1054,6 +1054,12 @@ def : Pat<(int_x86_avx_cvtt_ps2dq_256 VR256:$src),
def : Pat<(int_x86_avx_cvtt_ps2dq_256 (memopv8f32 addr:$src)),
(VCVTTPS2DQYrm addr:$src)>;
// Match fround for 128/256-bit conversions
def : Pat<(v4f32 (fround (v4f64 VR256:$src))),
(VCVTPD2PSYrr VR256:$src)>;
def : Pat<(v4f32 (fround (loadv4f64 addr:$src))),
(VCVTPD2PSYrm addr:$src)>;
//===----------------------------------------------------------------------===//
// SSE 1 & 2 - Compare Instructions
//===----------------------------------------------------------------------===//

7
test/CodeGen/X86/avx-256-cvt.ll
View File

@ -12,3 +12,10 @@ define <8 x i32> @funcB(<8 x float> %a) nounwind {
ret <8 x i32> %b
}
; CHECK: vcvtpd2psy %ymm
; CHECK-NEXT: vcvtpd2psy %ymm
; CHECK-NEXT: vinsertf128 $1
define <8 x float> @funcC(<8 x double> %b) nounwind {
%a = fptrunc <8 x double> %b to <8 x float>
ret <8 x float> %a
}