6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-11-24 23:19:03 +00:00
Code Issues Projects Releases Wiki Activity

[mips][microMIPS] Implement CodeGen support for SLL16 and SRL16 instructions

Browse Source 
Differential Revision: http://reviews.llvm.org/D5774


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220474 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Zoran Jovanovic
2014-10-23 10:42:01 +00:00
parent 9982879c4e
commit 558236adf0
7 changed files with 64 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

9
lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
View File

@@ -692,4 +692,13 @@ MipsMCCodeEmitter::getSimm18Lsl3Encoding(const MCInst &MI, unsigned OpNo,
return 0;
}
unsigned
MipsMCCodeEmitter::getUImm3Mod8Encoding(const MCInst &MI, unsigned OpNo,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const {
assert(MI.getOperand(OpNo).isImm());
const MCOperand &MO = MI.getOperand(OpNo);
return MO.getImm() % 8;
}
#include "MipsGenMCCodeEmitter.inc"