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llvm-mc/x86: Rename X86Operand::ScaleReg to IndexReg and make order consistent
with syntax. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74679 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -37,8 +37,8 @@ struct AsmParser::X86Operand {
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unsigned SegReg;
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MCValue Disp;
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unsigned BaseReg;
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unsigned IndexReg;
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unsigned Scale;
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unsigned ScaleReg;
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} Mem;
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};
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@ -55,14 +55,14 @@ struct AsmParser::X86Operand {
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return Res;
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}
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static X86Operand CreateMem(unsigned SegReg, MCValue Disp, unsigned BaseReg,
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unsigned Scale, unsigned ScaleReg) {
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unsigned IndexReg, unsigned Scale) {
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X86Operand Res;
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Res.Kind = Memory;
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Res.Mem.SegReg = SegReg;
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Res.Mem.Disp = Disp;
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Res.Mem.BaseReg = BaseReg;
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Res.Mem.IndexReg = IndexReg;
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Res.Mem.Scale = Scale;
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Res.Mem.ScaleReg = ScaleReg;
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return Res;
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}
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};
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@ -152,7 +152,7 @@ bool AsmParser::ParseX86MemOperand(X86Operand &Op) {
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// If we reached here, then we just ate the ( of the memory operand. Process
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// the rest of the memory operand.
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unsigned BaseReg = 0, ScaleReg = 0, Scale = 0;
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unsigned BaseReg = 0, IndexReg = 0, Scale = 0;
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if (Lexer.is(asmtok::Register)) {
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BaseReg = 123; // FIXME: decode reg #
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@ -163,7 +163,7 @@ bool AsmParser::ParseX86MemOperand(X86Operand &Op) {
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Lexer.Lex(); // eat the comma.
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if (Lexer.is(asmtok::Register)) {
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ScaleReg = 123; // FIXME: decode reg #
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IndexReg = 123; // FIXME: decode reg #
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Lexer.Lex(); // eat the register.
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Scale = 1; // If not specified, the scale defaults to 1.
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}
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@ -187,7 +187,7 @@ bool AsmParser::ParseX86MemOperand(X86Operand &Op) {
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return TokError("unexpected token in memory operand");
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Lexer.Lex(); // Eat the ')'.
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Op = X86Operand::CreateMem(SegReg, Disp, BaseReg, Scale, ScaleReg);
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Op = X86Operand::CreateMem(SegReg, Disp, BaseReg, IndexReg, Scale);
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return false;
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}
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