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https://github.com/c64scene-ar/llvm-6502.git
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*** empty log message ***
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5138 91177308-0d34-0410-b5e6-96231b3b80d8
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03ab7af4de
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1 file changed
+20
-12
@@ -80,6 +80,7 @@ public:
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MO_UnextendedImmed,
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MO_UnextendedImmed,
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MO_PCRelativeDisp,
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MO_PCRelativeDisp,
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MO_MachineBasicBlock, // MachineBasicBlock reference
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MO_MachineBasicBlock, // MachineBasicBlock reference
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MO_FrameIndex, // Abstract Stack Frame Index
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};
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};
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private:
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private:
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@@ -182,28 +183,27 @@ public:
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bool isImmediate() const {
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bool isImmediate() const {
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return opType == MO_SignExtendedImmed || opType == MO_UnextendedImmed;
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return opType == MO_SignExtendedImmed || opType == MO_UnextendedImmed;
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}
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}
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bool isFrameIndex() const { return opType == MO_FrameIndex; }
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inline Value* getVRegValue () const {
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Value* getVRegValue() const {
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assert(opType == MO_VirtualRegister || opType == MO_CCRegister ||
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assert(opType == MO_VirtualRegister || opType == MO_CCRegister ||
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opType == MO_PCRelativeDisp);
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isPCRelativeDisp());
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return value;
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return value;
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}
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}
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inline Value* getVRegValueOrNull() const {
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Value* getVRegValueOrNull() const {
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return (opType == MO_VirtualRegister || opType == MO_CCRegister ||
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return (opType == MO_VirtualRegister || opType == MO_CCRegister ||
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opType == MO_PCRelativeDisp)? value : NULL;
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isPCRelativeDisp()) ? value : NULL;
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}
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}
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inline int getMachineRegNum() const {
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int getMachineRegNum() const {
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assert(opType == MO_MachineRegister);
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assert(opType == MO_MachineRegister);
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return regNum;
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return regNum;
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}
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}
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inline int64_t getImmedValue () const {
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int64_t getImmedValue() const { assert(isImmediate()); return immedVal; }
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assert(isImmediate());
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return immedVal;
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}
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MachineBasicBlock *getMachineBasicBlock() const {
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MachineBasicBlock *getMachineBasicBlock() const {
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assert(isMachineBasicBlock() && "Can't get MBB in non-MBB operand!");
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assert(isMachineBasicBlock() && "Can't get MBB in non-MBB operand!");
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return MBB;
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return MBB;
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}
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}
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unsigned getFrameIndex() const { assert(isFrameIndex()); return immedVal; }
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bool opIsUse () const { return (flags & USEDEFMASK) == 0; }
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bool opIsUse () const { return (flags & USEDEFMASK) == 0; }
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bool opIsDef () const { return flags & DEFFLAG; }
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bool opIsDef () const { return flags & DEFFLAG; }
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@@ -214,20 +214,20 @@ public:
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bool opLoBits64 () const { return flags & LOFLAG64; }
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bool opLoBits64 () const { return flags & LOFLAG64; }
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// used to check if a machine register has been allocated to this operand
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// used to check if a machine register has been allocated to this operand
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inline bool hasAllocatedReg() const {
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bool hasAllocatedReg() const {
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return (regNum >= 0 &&
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return (regNum >= 0 &&
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(opType == MO_VirtualRegister || opType == MO_CCRegister ||
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(opType == MO_VirtualRegister || opType == MO_CCRegister ||
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opType == MO_MachineRegister));
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opType == MO_MachineRegister));
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}
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}
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// used to get the reg number if when one is allocated
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// used to get the reg number if when one is allocated
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inline int getAllocatedRegNum() const {
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int getAllocatedRegNum() const {
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assert(opType == MO_VirtualRegister || opType == MO_CCRegister ||
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assert(opType == MO_VirtualRegister || opType == MO_CCRegister ||
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opType == MO_MachineRegister);
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opType == MO_MachineRegister);
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return regNum;
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return regNum;
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}
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}
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inline unsigned getReg() const {
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unsigned getReg() const {
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assert(hasAllocatedReg() && "Cannot call MachineOperand::getReg()!");
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assert(hasAllocatedReg() && "Cannot call MachineOperand::getReg()!");
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return regNum;
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return regNum;
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}
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}
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@@ -511,6 +511,14 @@ public:
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operands.push_back(MachineOperand(MBB));
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operands.push_back(MachineOperand(MBB));
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}
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}
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/// addFrameIndexOperand - Add an abstract frame index to the instruction
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///
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void addFrameIndexOperand(unsigned Idx) {
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assert(!OperandsComplete() &&
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"Trying to add an operand to a machine instr that is already done!");
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operands.push_back(MachineOperand(Idx, MachineOperand::MO_FrameIndex));
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}
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unsigned substituteValue(const Value* oldVal, Value* newVal,
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unsigned substituteValue(const Value* oldVal, Value* newVal,
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bool defsOnly = true);
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bool defsOnly = true);
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