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https://github.com/c64scene-ar/llvm-6502.git
synced 2025-08-09 11:25:55 +00:00
[mips] Remove trivial header for the Mips16HardFloat pass. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232259 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@@ -24,6 +24,7 @@ namespace llvm {
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class FunctionPass;
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ModulePass *createMipsOs16Pass(MipsTargetMachine &TM);
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ModulePass *createMips16HardFloatPass(MipsTargetMachine &TM);
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FunctionPass *createMipsOptimizePICCallPass(MipsTargetMachine &TM);
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FunctionPass *createMipsDelaySlotFillerPass(MipsTargetMachine &TM);
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@@ -11,33 +11,33 @@
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//
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//===----------------------------------------------------------------------===//
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#include "Mips16HardFloat.h"
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#include "MipsTargetMachine.h"
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#include "llvm/IR/Module.h"
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#include "llvm/IR/Value.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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#include "MipsTargetMachine.h"
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#include <algorithm>
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#include <string>
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using namespace llvm;
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#define DEBUG_TYPE "mips16-hard-float"
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static void inlineAsmOut
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(LLVMContext &C, StringRef AsmString, BasicBlock *BB ) {
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std::vector<llvm::Type *> AsmArgTypes;
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std::vector<llvm::Value*> AsmArgs;
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llvm::FunctionType *AsmFTy =
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llvm::FunctionType::get(Type::getVoidTy(C),
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AsmArgTypes, false);
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llvm::InlineAsm *IA =
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llvm::InlineAsm::get(AsmFTy, AsmString, "", true,
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/* IsAlignStack */ false,
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llvm::InlineAsm::AD_ATT);
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CallInst::Create(IA, AsmArgs, "", BB);
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namespace {
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class Mips16HardFloat : public ModulePass {
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public:
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static char ID;
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Mips16HardFloat(MipsTargetMachine &TM_) : ModulePass(ID), TM(TM_) {}
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const char *getPassName() const override {
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return "MIPS16 Hard Float Pass";
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}
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namespace {
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bool runOnModule(Module &M) override;
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protected:
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const MipsTargetMachine &TM;
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};
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class InlineAsmHelper {
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LLVMContext &C;
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@@ -48,11 +48,21 @@ public:
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}
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void Out(StringRef AsmString) {
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inlineAsmOut(C, AsmString, BB);
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std::vector<llvm::Type *> AsmArgTypes;
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std::vector<llvm::Value*> AsmArgs;
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llvm::FunctionType *AsmFTy = llvm::FunctionType::get(Type::getVoidTy(C),
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AsmArgTypes, false);
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llvm::InlineAsm *IA = llvm::InlineAsm::get(AsmFTy, AsmString, "", true,
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/* IsAlignStack */ false,
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llvm::InlineAsm::AD_ATT);
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CallInst::Create(IA, AsmArgs, "", BB);
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}
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};
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char Mips16HardFloat::ID = 0;
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}
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};
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}
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//
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// Return types that matter for hard float are:
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// float, double, complex float, and complex double
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@@ -184,9 +194,7 @@ static bool needsFPHelperFromSig(Function &F) {
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// We swap between FP and Integer registers to allow Mips16 and Mips32 to
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// interoperate
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//
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static void swapFPIntParams
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(FPParamVariant PV, Module *M, InlineAsmHelper &IAH,
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static void swapFPIntParams(FPParamVariant PV, Module *M, InlineAsmHelper &IAH,
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bool LE, bool ToFP) {
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//LLVMContext &Context = M->getContext();
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std::string MI = ToFP? "mtc1 ": "mfc1 ";
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@@ -244,6 +252,7 @@ static void swapFPIntParams
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return;
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}
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}
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//
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// Make sure that we know we already need a stub for this function.
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// Having called needsFPHelperFromSig
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@@ -333,9 +342,8 @@ static void assureFPCallStub(Function &F, Module *M,
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//
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// Functions that are llvm intrinsics and don't need helpers.
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//
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static const char *IntrinsicInline[] =
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{"fabs",
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"fabsf",
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static const char *IntrinsicInline[] = {
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"fabs", "fabsf",
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"llvm.ceil.f32", "llvm.ceil.f64",
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"llvm.copysign.f32", "llvm.copysign.f64",
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"llvm.cos.f32", "llvm.cos.f64",
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@@ -386,9 +394,10 @@ static bool fixupFPReturnAndCall(Function &F, Module *M,
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Type *T = RVal->getType();
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FPReturnVariant RV = whichFPReturnVariant(T);
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if (RV == NoFPRet) continue;
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static const char* Helper[NoFPRet] =
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{"__mips16_ret_sf", "__mips16_ret_df", "__mips16_ret_sc",
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"__mips16_ret_dc"};
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static const char* Helper[NoFPRet] = {
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"__mips16_ret_sf", "__mips16_ret_df", "__mips16_ret_sc",
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"__mips16_ret_dc"
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};
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const char *Name = Helper[RV];
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AttributeSet A;
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Value *Params[] = {RVal};
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@@ -491,20 +500,6 @@ static void removeUseSoftFloat(Function &F) {
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F.addAttributes(AttributeSet::FunctionIndex, A);
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}
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namespace {
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class Mips16HardFloat : public ModulePass {
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public:
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static char ID;
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Mips16HardFloat(MipsTargetMachine &TM_) : ModulePass(ID), TM(TM_) {}
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const char *getPassName() const override { return "MIPS16 Hard Float Pass"; }
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bool runOnModule(Module &M) override;
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protected:
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const MipsTargetMachine &TM;
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};
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} // namespace
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//
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// This pass only makes sense when the underlying chip has floating point but
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@@ -545,9 +540,7 @@ bool Mips16HardFloat::runOnModule(Module &M) {
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return Modified;
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}
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char Mips16HardFloat::ID = 0;
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ModulePass *llvm::createMips16HardFloat(MipsTargetMachine &TM) {
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ModulePass *llvm::createMips16HardFloatPass(MipsTargetMachine &TM) {
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return new Mips16HardFloat(TM);
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}
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@@ -1,25 +0,0 @@
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//===---- Mips16HardFloat.h for Mips16 Hard Float --------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines a phase which implements part of the floating point
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// interoperability between Mips16 and Mips32 code.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_MIPS_MIPS16HARDFLOAT_H
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#define LLVM_LIB_TARGET_MIPS_MIPS16HARDFLOAT_H
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namespace llvm {
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class MipsTargetMachine;
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class ModulePass;
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ModulePass *createMips16HardFloat(MipsTargetMachine &TM);
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}
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#endif
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@@ -14,7 +14,6 @@
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#include "MipsTargetMachine.h"
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#include "Mips.h"
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#include "Mips16FrameLowering.h"
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#include "Mips16HardFloat.h"
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#include "Mips16ISelDAGToDAG.h"
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#include "Mips16ISelLowering.h"
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#include "Mips16InstrInfo.h"
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@@ -215,7 +214,7 @@ void MipsPassConfig::addIRPasses() {
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if (getMipsSubtarget().os16())
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addPass(createMipsOs16Pass(getMipsTargetMachine()));
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if (getMipsSubtarget().inMips16HardFloat())
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addPass(createMips16HardFloat(getMipsTargetMachine()));
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addPass(createMips16HardFloatPass(getMipsTargetMachine()));
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}
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// Install an instruction selector pass using
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// the ISelDag to gen Mips code.
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