[mips] Remove trivial header for the Mips16HardFloat pass. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232259 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Vasileios Kalintiris
2015-03-14 09:02:23 +00:00
parent 3ccd82623a
commit 56fe63e20e
4 changed files with 97 additions and 129 deletions

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@@ -24,6 +24,7 @@ namespace llvm {
class FunctionPass;
ModulePass *createMipsOs16Pass(MipsTargetMachine &TM);
ModulePass *createMips16HardFloatPass(MipsTargetMachine &TM);
FunctionPass *createMipsOptimizePICCallPass(MipsTargetMachine &TM);
FunctionPass *createMipsDelaySlotFillerPass(MipsTargetMachine &TM);

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@@ -11,33 +11,33 @@
//
//===----------------------------------------------------------------------===//
#include "Mips16HardFloat.h"
#include "MipsTargetMachine.h"
#include "llvm/IR/Module.h"
#include "llvm/IR/Value.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
#include "MipsTargetMachine.h"
#include <algorithm>
#include <string>
using namespace llvm;
#define DEBUG_TYPE "mips16-hard-float"
static void inlineAsmOut
(LLVMContext &C, StringRef AsmString, BasicBlock *BB ) {
std::vector<llvm::Type *> AsmArgTypes;
std::vector<llvm::Value*> AsmArgs;
llvm::FunctionType *AsmFTy =
llvm::FunctionType::get(Type::getVoidTy(C),
AsmArgTypes, false);
llvm::InlineAsm *IA =
llvm::InlineAsm::get(AsmFTy, AsmString, "", true,
/* IsAlignStack */ false,
llvm::InlineAsm::AD_ATT);
CallInst::Create(IA, AsmArgs, "", BB);
namespace {
class Mips16HardFloat : public ModulePass {
public:
static char ID;
Mips16HardFloat(MipsTargetMachine &TM_) : ModulePass(ID), TM(TM_) {}
const char *getPassName() const override {
return "MIPS16 Hard Float Pass";
}
namespace {
bool runOnModule(Module &M) override;
protected:
const MipsTargetMachine &TM;
};
class InlineAsmHelper {
LLVMContext &C;
@@ -48,11 +48,21 @@ public:
}
void Out(StringRef AsmString) {
inlineAsmOut(C, AsmString, BB);
std::vector<llvm::Type *> AsmArgTypes;
std::vector<llvm::Value*> AsmArgs;
llvm::FunctionType *AsmFTy = llvm::FunctionType::get(Type::getVoidTy(C),
AsmArgTypes, false);
llvm::InlineAsm *IA = llvm::InlineAsm::get(AsmFTy, AsmString, "", true,
/* IsAlignStack */ false,
llvm::InlineAsm::AD_ATT);
CallInst::Create(IA, AsmArgs, "", BB);
}
};
char Mips16HardFloat::ID = 0;
}
};
}
//
// Return types that matter for hard float are:
// float, double, complex float, and complex double
@@ -184,9 +194,7 @@ static bool needsFPHelperFromSig(Function &F) {
// We swap between FP and Integer registers to allow Mips16 and Mips32 to
// interoperate
//
static void swapFPIntParams
(FPParamVariant PV, Module *M, InlineAsmHelper &IAH,
static void swapFPIntParams(FPParamVariant PV, Module *M, InlineAsmHelper &IAH,
bool LE, bool ToFP) {
//LLVMContext &Context = M->getContext();
std::string MI = ToFP? "mtc1 ": "mfc1 ";
@@ -244,6 +252,7 @@ static void swapFPIntParams
return;
}
}
//
// Make sure that we know we already need a stub for this function.
// Having called needsFPHelperFromSig
@@ -333,9 +342,8 @@ static void assureFPCallStub(Function &F, Module *M,
//
// Functions that are llvm intrinsics and don't need helpers.
//
static const char *IntrinsicInline[] =
{"fabs",
"fabsf",
static const char *IntrinsicInline[] = {
"fabs", "fabsf",
"llvm.ceil.f32", "llvm.ceil.f64",
"llvm.copysign.f32", "llvm.copysign.f64",
"llvm.cos.f32", "llvm.cos.f64",
@@ -386,9 +394,10 @@ static bool fixupFPReturnAndCall(Function &F, Module *M,
Type *T = RVal->getType();
FPReturnVariant RV = whichFPReturnVariant(T);
if (RV == NoFPRet) continue;
static const char* Helper[NoFPRet] =
{"__mips16_ret_sf", "__mips16_ret_df", "__mips16_ret_sc",
"__mips16_ret_dc"};
static const char* Helper[NoFPRet] = {
"__mips16_ret_sf", "__mips16_ret_df", "__mips16_ret_sc",
"__mips16_ret_dc"
};
const char *Name = Helper[RV];
AttributeSet A;
Value *Params[] = {RVal};
@@ -491,20 +500,6 @@ static void removeUseSoftFloat(Function &F) {
F.addAttributes(AttributeSet::FunctionIndex, A);
}
namespace {
class Mips16HardFloat : public ModulePass {
public:
static char ID;
Mips16HardFloat(MipsTargetMachine &TM_) : ModulePass(ID), TM(TM_) {}
const char *getPassName() const override { return "MIPS16 Hard Float Pass"; }
bool runOnModule(Module &M) override;
protected:
const MipsTargetMachine &TM;
};
} // namespace
//
// This pass only makes sense when the underlying chip has floating point but
@@ -545,9 +540,7 @@ bool Mips16HardFloat::runOnModule(Module &M) {
return Modified;
}
char Mips16HardFloat::ID = 0;
ModulePass *llvm::createMips16HardFloat(MipsTargetMachine &TM) {
ModulePass *llvm::createMips16HardFloatPass(MipsTargetMachine &TM) {
return new Mips16HardFloat(TM);
}

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@@ -1,25 +0,0 @@
//===---- Mips16HardFloat.h for Mips16 Hard Float --------===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file defines a phase which implements part of the floating point
// interoperability between Mips16 and Mips32 code.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_LIB_TARGET_MIPS_MIPS16HARDFLOAT_H
#define LLVM_LIB_TARGET_MIPS_MIPS16HARDFLOAT_H
namespace llvm {
class MipsTargetMachine;
class ModulePass;
ModulePass *createMips16HardFloat(MipsTargetMachine &TM);
}
#endif

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@@ -14,7 +14,6 @@
#include "MipsTargetMachine.h"
#include "Mips.h"
#include "Mips16FrameLowering.h"
#include "Mips16HardFloat.h"
#include "Mips16ISelDAGToDAG.h"
#include "Mips16ISelLowering.h"
#include "Mips16InstrInfo.h"
@@ -215,7 +214,7 @@ void MipsPassConfig::addIRPasses() {
if (getMipsSubtarget().os16())
addPass(createMipsOs16Pass(getMipsTargetMachine()));
if (getMipsSubtarget().inMips16HardFloat())
addPass(createMips16HardFloat(getMipsTargetMachine()));
addPass(createMips16HardFloatPass(getMipsTargetMachine()));
}
// Install an instruction selector pass using
// the ISelDag to gen Mips code.