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Add new function attribute - noimplicitfloat

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Update code generator to use this attribute and remove NoImplicitFloat target option.
Update llc to set this attribute when -no-implicit-float command line option is used.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72959 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Devang Patel 2009-06-05 21:57:13 +00:00
parent abc0199680
commit 578efa920a
13 changed files with 54 additions and 38 deletions
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4
include/llvm/Attributes.h
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@ -55,6 +55,8 @@ const Attributes Alignment = 31<<16; ///< Alignment of parameter (5 bits)
// 0 means unaligned different from align 1
const Attributes NoCapture = 1<<21; ///< Function creates no aliases of pointer
const Attributes NoRedZone = 1<<22; /// disable redzone
const Attributes NoImplicitFloat = 1<<23; /// disable implicit floating point
/// instructions.
/// @brief Attributes that only apply to function parameters.
const Attributes ParameterOnly = ByVal | Nest | StructRet | NoCapture;
@ -62,7 +64,7 @@ const Attributes ParameterOnly = ByVal | Nest | StructRet | NoCapture;
/// @brief Attributes that only apply to function.
const Attributes FunctionOnly = NoReturn | NoUnwind | ReadNone | ReadOnly |
NoInline | AlwaysInline | OptimizeForSize | StackProtect | StackProtectReq |
NoRedZone;
NoRedZone | NoImplicitFloat;
/// @brief Parameter attributes that do not apply to vararg call arguments.
const Attributes VarArgsIncompatible = StructRet;

3
include/llvm/Target/TargetLowering.h
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@ -632,7 +632,8 @@ public:
/// It returns MVT::iAny if SelectionDAG should be responsible for
/// determining it.
virtual MVT getOptimalMemOpType(uint64_t Size, unsigned Align,
bool isSrcConst, bool isSrcStr) const {
bool isSrcConst, bool isSrcStr,
SelectionDAG &DAG) const {
return MVT::iAny;
}

6
include/llvm/Target/TargetOptions.h
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@ -73,12 +73,6 @@ namespace llvm {
/// target FP instructions.
extern bool UseSoftFloat;
/// NoImplicitFloat - This flag is enabled when the -no-implicit-float flag is
/// specified on the command line. When this flag is on, the code generator
/// won't generate any implicit floating point instructions. I.e., no XMM or
/// x87 or vectorized memcpy/memmove instructions. This is for X86 only.
extern bool NoImplicitFloat;
/// NoZerosInBSS - By default some codegens place zero-initialized data to
/// .bss section. This flag disables such behaviour (necessary, e.g. for
/// crt*.o compiling).

1
lib/AsmParser/LLLexer.cpp
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@ -548,6 +548,7 @@ lltok::Kind LLLexer::LexIdentifier() {
KEYWORD(ssp);
KEYWORD(sspreq);
KEYWORD(noredzone);
KEYWORD(noimplicitfloat);
KEYWORD(type);
KEYWORD(opaque);

37
lib/AsmParser/LLParser.cpp
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@ -712,25 +712,26 @@ bool LLParser::ParseOptionalAttrs(unsigned &Attrs, unsigned AttrKind) {
return Error(AttrLoc, "invalid use of parameter-only attribute");
return false;
case lltok::kw_zeroext: Attrs |= Attribute::ZExt; break;
case lltok::kw_signext: Attrs |= Attribute::SExt; break;
case lltok::kw_inreg: Attrs |= Attribute::InReg; break;
case lltok::kw_sret: Attrs |= Attribute::StructRet; break;
case lltok::kw_noalias: Attrs |= Attribute::NoAlias; break;
case lltok::kw_nocapture: Attrs |= Attribute::NoCapture; break;
case lltok::kw_byval: Attrs |= Attribute::ByVal; break;
case lltok::kw_nest: Attrs |= Attribute::Nest; break;
case lltok::kw_zeroext: Attrs |= Attribute::ZExt; break;
case lltok::kw_signext: Attrs |= Attribute::SExt; break;
case lltok::kw_inreg: Attrs |= Attribute::InReg; break;
case lltok::kw_sret: Attrs |= Attribute::StructRet; break;
case lltok::kw_noalias: Attrs |= Attribute::NoAlias; break;
case lltok::kw_nocapture: Attrs |= Attribute::NoCapture; break;
case lltok::kw_byval: Attrs |= Attribute::ByVal; break;
case lltok::kw_nest: Attrs |= Attribute::Nest; break;
case lltok::kw_noreturn: Attrs |= Attribute::NoReturn; break;
case lltok::kw_nounwind: Attrs |= Attribute::NoUnwind; break;
case lltok::kw_noinline: Attrs |= Attribute::NoInline; break;
case lltok::kw_readnone: Attrs |= Attribute::ReadNone; break;
case lltok::kw_readonly: Attrs |= Attribute::ReadOnly; break;
case lltok::kw_alwaysinline: Attrs |= Attribute::AlwaysInline; break;
case lltok::kw_optsize: Attrs |= Attribute::OptimizeForSize; break;
case lltok::kw_ssp: Attrs |= Attribute::StackProtect; break;
case lltok::kw_sspreq: Attrs |= Attribute::StackProtectReq; break;
case lltok::kw_noredzone: Attrs |= Attribute::NoRedZone; break;
case lltok::kw_noreturn: Attrs |= Attribute::NoReturn; break;
case lltok::kw_nounwind: Attrs |= Attribute::NoUnwind; break;
case lltok::kw_noinline: Attrs |= Attribute::NoInline; break;
case lltok::kw_readnone: Attrs |= Attribute::ReadNone; break;
case lltok::kw_readonly: Attrs |= Attribute::ReadOnly; break;
case lltok::kw_alwaysinline: Attrs |= Attribute::AlwaysInline; break;
case lltok::kw_optsize: Attrs |= Attribute::OptimizeForSize; break;
case lltok::kw_ssp: Attrs |= Attribute::StackProtect; break;
case lltok::kw_sspreq: Attrs |= Attribute::StackProtectReq; break;
case lltok::kw_noredzone: Attrs |= Attribute::NoRedZone; break;
case lltok::kw_noimplicitfloat: Attrs |= Attribute::NoImplicitFloat; break;
case lltok::kw_align: {
unsigned Alignment;

1
lib/AsmParser/LLToken.h
View File

@ -81,6 +81,7 @@ namespace lltok {
kw_ssp,
kw_sspreq,
kw_noredzone,
kw_noimplicitfloat,
kw_type,
kw_opaque,

2
lib/CodeGen/SelectionDAG/SelectionDAG.cpp
View File

@ -3062,7 +3062,7 @@ bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps,
isSrcStr = isMemSrcFromString(Src, Str);
bool isSrcConst = isa<ConstantSDNode>(Src);
bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses();
MVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr);
MVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr, DAG);
if (VT != MVT::iAny) {
unsigned NewAlign = (unsigned)
TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT());

5
lib/Target/TargetMachine.cpp
View File

@ -85,11 +85,6 @@ GenerateSoftFloatCalls("soft-float",
cl::location(UseSoftFloat),
cl::init(false));
static cl::opt<bool, true>
GenerateNoImplicitFloats("no-implicit-float",
cl::desc("Don't generate implicit floating point instructions (x86-only)"),
cl::location(NoImplicitFloat),
cl::init(false));
static cl::opt<bool, true>
DontPlaceZerosInBSS("nozero-initialized-in-bss",
cl::desc("Don't place zero-initialized symbols into bss section"),
cl::location(NoZerosInBSS),

17
lib/Target/X86/X86ISelLowering.cpp
View File

@ -868,11 +868,14 @@ unsigned X86TargetLowering::getByValTypeAlignment(const Type *Ty) const {
/// determining it.
MVT
X86TargetLowering::getOptimalMemOpType(uint64_t Size, unsigned Align,
bool isSrcConst, bool isSrcStr) const {
bool isSrcConst, bool isSrcStr,
SelectionDAG &DAG) const {
// FIXME: This turns off use of xmm stores for memset/memcpy on targets like
// linux. This is because the stack realignment code can't handle certain
// cases like PR2962. This should be removed when PR2962 is fixed.
if (!NoImplicitFloat && Subtarget->getStackAlignment() >= 16) {
const Function *F = DAG.getMachineFunction().getFunction();
bool NoImplicitFloatOps = F->hasFnAttr(Attribute::NoImplicitFloat);
if (!NoImplicitFloatOps && Subtarget->getStackAlignment() >= 16) {
if ((isSrcConst || isSrcStr) && Subtarget->hasSSE2() && Size >= 16)
return MVT::v4i32;
if ((isSrcConst || isSrcStr) && Subtarget->hasSSE1() && Size >= 16)
@ -1404,11 +1407,12 @@ X86TargetLowering::LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG) {
unsigned NumXMMRegs = CCInfo.getFirstUnallocated(XMMArgRegs,
TotalNumXMMRegs);
bool NoImplicitFloatOps = Fn->hasFnAttr(Attribute::NoImplicitFloat);
assert(!(NumXMMRegs && !Subtarget->hasSSE1()) &&
"SSE register cannot be used when SSE is disabled!");
assert(!(NumXMMRegs && UseSoftFloat && NoImplicitFloat) &&
assert(!(NumXMMRegs && UseSoftFloat && NoImplicitFloatOps) &&
"SSE register cannot be used when SSE is disabled!");
if (UseSoftFloat || NoImplicitFloat || !Subtarget->hasSSE1())
if (UseSoftFloat || NoImplicitFloatOps || !Subtarget->hasSSE1())
// Kernel mode asks for SSE to be disabled, so don't push them
// on the stack.
TotalNumXMMRegs = 0;
@ -8281,7 +8285,10 @@ static SDValue PerformSTORECombine(SDNode *N, SelectionDAG &DAG,
if (VT.getSizeInBits() != 64)
return SDValue();
bool F64IsLegal = !UseSoftFloat && !NoImplicitFloat && Subtarget->hasSSE2();
const Function *F = DAG.getMachineFunction().getFunction();
bool NoImplicitFloatOps = F->hasFnAttr(Attribute::NoImplicitFloat);
bool F64IsLegal = !UseSoftFloat && !NoImplicitFloatOps
&& Subtarget->hasSSE2();
if ((VT.isVector() ||
(VT == MVT::i64 && F64IsLegal && !Subtarget->is64Bit())) &&
isa<LoadSDNode>(St->getValue()) &&

3
lib/Target/X86/X86ISelLowering.h
View File

@ -378,7 +378,8 @@ namespace llvm {
/// determining it.
virtual
MVT getOptimalMemOpType(uint64_t Size, unsigned Align,
bool isSrcConst, bool isSrcStr) const;
bool isSrcConst, bool isSrcStr,
SelectionDAG &DAG) const;
/// LowerOperation - Provide custom lowering hooks for some operations.
///

2
lib/VMCore/Attributes.cpp
View File

@ -61,6 +61,8 @@ std::string Attribute::getAsString(Attributes Attrs) {
Result += "sspreq ";
if (Attrs & Attribute::NoRedZone)
Result += "noredzone ";
if (Attrs & Attribute::NoImplicitFloat)
Result += "noimplicitfloat ";
if (Attrs & Attribute::Alignment) {
Result += "align ";
Result += utostr(Attribute::getAlignmentFromAttrs(Attrs));

4
test/Other/2009-06-05-no-implicit-float.ll Normal file
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@ -0,0 +1,4 @@
; RUN: llvm-as < %s | opt -verify | llvm-dis | grep noimplicitfloat
define void @f() noimplicitfloat {
}

7
tools/llc/llc.cpp
View File

@ -105,6 +105,11 @@ DisableRedZone("disable-red-zone",
cl::desc("Do not emit code that uses the red zone."),
cl::init(false));
static cl::opt<bool>
NoImplicitFloats("no-implicit-float",
cl::desc("Don't generate implicit floating point instructions (x86-only)"),
cl::init(false));
// GetFileNameRoot - Helper function to get the basename of a filename.
static inline std::string
GetFileNameRoot(const std::string &InputFilename) {
@ -344,6 +349,8 @@ int main(int argc, char **argv) {
if (!I->isDeclaration()) {
if (DisableRedZone)
I->addFnAttr(Attribute::NoRedZone);
if (NoImplicitFloats)
I->addFnAttr(Attribute::NoImplicitFloat);
Passes.run(*I);
}