Convert register liveness tracking to work on a sub-register level instead of just register units.

Reviewed by Andy

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197315 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Juergen Ributzka
2013-12-14 06:52:56 +00:00
parent f562e09c9f
commit 57c38e3faa
7 changed files with 291 additions and 234 deletions

View File

@ -23,7 +23,7 @@
#define DEBUG_TYPE "execution-fix"
#include "llvm/CodeGen/Passes.h"
#include "llvm/ADT/PostOrderIterator.h"
#include "llvm/CodeGen/LiveRegUnits.h"
#include "llvm/CodeGen/LivePhysRegs.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/Support/Allocator.h"
@ -141,7 +141,7 @@ class ExeDepsFix : public MachineFunctionPass {
std::vector<std::pair<MachineInstr*, unsigned> > UndefReads;
/// Storage for register unit liveness.
LiveRegUnits LiveUnits;
LivePhysRegs LiveRegSet;
/// Current instruction number.
/// The first instruction in each basic block is 0.
@ -352,7 +352,7 @@ void ExeDepsFix::enterBasicBlock(MachineBasicBlock *MBB) {
// Set up UndefReads to track undefined register reads.
UndefReads.clear();
LiveUnits.clear();
LiveRegSet.clear();
// Set up LiveRegs to represent registers entering MBB.
if (!LiveRegs)
@ -547,21 +547,19 @@ void ExeDepsFix::processUndefReads(MachineBasicBlock *MBB) {
return;
// Collect this block's live out register units.
LiveUnits.init(TRI);
for (MachineBasicBlock::const_succ_iterator SI = MBB->succ_begin(),
SE = MBB->succ_end(); SI != SE; ++SI) {
LiveUnits.addLiveIns(*SI, *TRI);
}
LiveRegSet.init(TRI);
LiveRegSet.addLiveOuts(MBB);
MachineInstr *UndefMI = UndefReads.back().first;
unsigned OpIdx = UndefReads.back().second;
for (MachineBasicBlock::reverse_iterator I = MBB->rbegin(), E = MBB->rend();
I != E; ++I) {
// Update liveness, including the current instruction's defs.
LiveUnits.stepBackward(*I, *TRI);
LiveRegSet.stepBackward(*I);
if (UndefMI == &*I) {
if (!LiveUnits.contains(UndefMI->getOperand(OpIdx).getReg(), *TRI))
if (!LiveRegSet.contains(UndefMI->getOperand(OpIdx).getReg()))
TII->breakPartialRegDependency(UndefMI, OpIdx, TRI);
UndefReads.pop_back();