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https://github.com/c64scene-ar/llvm-6502.git
synced 2025-11-01 15:17:25 +00:00
These methods no longer take a TargetRegisterClass* operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15774 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -25,12 +25,11 @@ SparcV8RegisterInfo::SparcV8RegisterInfo()
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: SparcV8GenRegisterInfo(V8::ADJCALLSTACKDOWN,
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V8::ADJCALLSTACKUP) {}
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int SparcV8RegisterInfo::storeRegToStackSlot(
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MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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unsigned SrcReg, int FrameIdx,
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const TargetRegisterClass *RC) const
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{
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int SparcV8RegisterInfo::
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storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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unsigned SrcReg, int FrameIdx) const {
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const TargetRegisterClass *RC = getRegClass(SrcReg);
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// On the order of operands here: think "[FrameIdx + 0] = SrcReg".
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if (RC == SparcV8::IntRegsRegisterClass)
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BuildMI (MBB, I, V8::ST, 3).addFrameIndex (FrameIdx).addSImm (0)
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@@ -46,12 +45,10 @@ int SparcV8RegisterInfo::storeRegToStackSlot(
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return 1;
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}
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int SparcV8RegisterInfo::loadRegFromStackSlot(
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MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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unsigned DestReg, int FrameIdx,
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const TargetRegisterClass *RC) const
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{
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int SparcV8RegisterInfo::
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loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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unsigned DestReg, int FrameIdx) const {
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const TargetRegisterClass *RC = getRegClass(DestReg);
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if (RC == SparcV8::IntRegsRegisterClass)
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BuildMI (MBB, I, V8::LD, 2, DestReg).addFrameIndex (FrameIdx).addSImm (0);
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else if (RC == SparcV8::FPRegsRegisterClass)
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