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Add support for encoding 2-register NEON instructions.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106891 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bob Wilson 2010-06-25 21:17:19 +00:00
parent ca5b8553ea
commit 583a2a0615
1 changed files with 25 additions and 3 deletions
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28
lib/Target/ARM/ARMCodeEmitter.cpp
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@ -139,7 +139,8 @@ namespace {
void emitMiscInstruction(const MachineInstr &MI); void emitMiscInstruction(const MachineInstr &MI);
void emitNEON1RegModImm(const MachineInstr &MI); void emitNEON1RegModImmInstruction(const MachineInstr &MI);
void emitNEON2RegInstruction(const MachineInstr &MI);
/// getMachineOpValue - Return binary encoding of operand. If the machine /// getMachineOpValue - Return binary encoding of operand. If the machine
/// operand requires relocation, record the relocation and return zero. /// operand requires relocation, record the relocation and return zero.
@ -412,7 +413,10 @@ void ARMCodeEmitter::emitInstruction(const MachineInstr &MI) {
break; break;
// NEON instructions. // NEON instructions.
case ARMII::N1RegModImmFrm: case ARMII::N1RegModImmFrm:
emitNEON1RegModImm(MI); emitNEON1RegModImmInstruction(MI);
break;
case ARMII::N2RegFrm:
emitNEON2RegInstruction(MI);
break; break;
} }
MCE.processDebugLoc(MI.getDebugLoc(), false); MCE.processDebugLoc(MI.getDebugLoc(), false);
@ -1555,7 +1559,16 @@ static unsigned encodeNEONRd(const MachineInstr &MI, unsigned OpIdx) {
return Binary; return Binary;
} }
void ARMCodeEmitter::emitNEON1RegModImm(const MachineInstr &MI) { static unsigned encodeNEONRm(const MachineInstr &MI, unsigned OpIdx) {
unsigned RegM = MI.getOperand(OpIdx).getReg();
unsigned Binary = 0;
RegM = ARMRegisterInfo::getRegisterNumbering(RegM);
Binary |= (RegM & 0xf);
Binary |= ((RegM >> 4) & 1) << ARMII::M_BitShift;
return Binary;
}
void ARMCodeEmitter::emitNEON1RegModImmInstruction(const MachineInstr &MI) {
unsigned Binary = getBinaryCodeForInstr(MI); unsigned Binary = getBinaryCodeForInstr(MI);
// Destination register is encoded in Dd. // Destination register is encoded in Dd.
Binary |= encodeNEONRd(MI, 0); Binary |= encodeNEONRd(MI, 0);
@ -1574,4 +1587,13 @@ void ARMCodeEmitter::emitNEON1RegModImm(const MachineInstr &MI) {
emitWordLE(Binary); emitWordLE(Binary);
} }
void ARMCodeEmitter::emitNEON2RegInstruction(const MachineInstr &MI) {
unsigned Binary = getBinaryCodeForInstr(MI);
// Destination register is encoded in Dd.
Binary |= encodeNEONRd(MI, 0);
Binary |= encodeNEONRm(MI, 1);
// FIXME: This does not handle VDUPfdf or VDUPfqf.
emitWordLE(Binary);
}
#include "ARMGenCodeEmitter.inc" #include "ARMGenCodeEmitter.inc"