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Don't allow vextractf128 to be folded with unaligned stores. We don't fold unaligned loads so shouldn't fold unaligned stores as it can cause an alignment fault to occur.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162658 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -7291,19 +7291,15 @@ def VEXTRACTF128mr : AVXAIi8<0x19, MRMDestMem, (outs),
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// Extract and store.
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let Predicates = [HasAVX] in {
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def : Pat<(alignedstore (int_x86_avx_vextractf128_ps_256 VR256:$src1, imm:$src2), addr:$dst),
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(VEXTRACTF128mr addr:$dst, VR256:$src1, imm:$src2)>;
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def : Pat<(alignedstore (int_x86_avx_vextractf128_pd_256 VR256:$src1, imm:$src2), addr:$dst),
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(VEXTRACTF128mr addr:$dst, VR256:$src1, imm:$src2)>;
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def : Pat<(alignedstore (int_x86_avx_vextractf128_si_256 VR256:$src1, imm:$src2), addr:$dst),
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(VEXTRACTF128mr addr:$dst, VR256:$src1, imm:$src2)>;
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def : Pat<(int_x86_sse_storeu_ps addr:$dst, (int_x86_avx_vextractf128_ps_256 VR256:$src1, imm:$src2)),
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(VEXTRACTF128mr addr:$dst, VR256:$src1, imm:$src2)>;
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def : Pat<(int_x86_sse2_storeu_pd addr:$dst, (int_x86_avx_vextractf128_pd_256 VR256:$src1, imm:$src2)),
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(VEXTRACTF128mr addr:$dst, VR256:$src1, imm:$src2)>;
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def : Pat<(int_x86_sse2_storeu_dq addr:$dst, (bc_v16i8 (int_x86_avx_vextractf128_si_256 VR256:$src1, imm:$src2))),
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(VEXTRACTF128mr addr:$dst, VR256:$src1, imm:$src2)>;
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def : Pat<(alignedstore (int_x86_avx_vextractf128_ps_256 VR256:$src1,
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imm:$src2), addr:$dst),
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(VEXTRACTF128mr addr:$dst, VR256:$src1, imm:$src2)>;
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def : Pat<(alignedstore (int_x86_avx_vextractf128_pd_256 VR256:$src1,
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imm:$src2), addr:$dst),
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(VEXTRACTF128mr addr:$dst, VR256:$src1, imm:$src2)>;
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def : Pat<(alignedstore (int_x86_avx_vextractf128_si_256 VR256:$src1,
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imm:$src2), addr:$dst),
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(VEXTRACTF128mr addr:$dst, VR256:$src1, imm:$src2)>;
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}
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// AVX1 patterns
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