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https://github.com/c64scene-ar/llvm-6502.git
synced 2025-08-15 06:29:05 +00:00
propagate struct size and alignment of byval arguments to the DAG
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40986 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@@ -190,6 +190,10 @@ public:
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StackOffset += Size;
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StackOffset += Size;
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return Result;
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return Result;
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}
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}
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void HandleStruct(unsigned ValNo, MVT::ValueType ValVT,
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MVT::ValueType LocVT, CCValAssign::LocInfo LocInfo,
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unsigned ArgFlags);
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private:
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private:
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/// MarkAllocated - Mark a register and all of its aliases as allocated.
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/// MarkAllocated - Mark a register and all of its aliases as allocated.
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void MarkAllocated(unsigned Reg);
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void MarkAllocated(unsigned Reg);
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@@ -68,6 +68,10 @@ namespace ISD {
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ByValOffs = 4,
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ByValOffs = 4,
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Nest = 1<<5, ///< Parameter is nested function static chain
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Nest = 1<<5, ///< Parameter is nested function static chain
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NestOffs = 5,
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NestOffs = 5,
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ByValAlign = 0xF << 6, //< The alignment of the struct
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ByValAlignOffs = 6,
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ByValSize = 0x1ffff << 10, //< The size of the struct
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ByValSizeOffs = 10,
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OrigAlignment = 0x1F<<27,
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OrigAlignment = 0x1F<<27,
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OrigAlignmentOffs = 27
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OrigAlignmentOffs = 27
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};
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};
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@@ -200,6 +204,10 @@ namespace ISD {
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/// Bit 0 - signness
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/// Bit 0 - signness
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/// Bit 1 - 'inreg' attribute
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/// Bit 1 - 'inreg' attribute
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/// Bit 2 - 'sret' attribute
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/// Bit 2 - 'sret' attribute
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/// Bit 4 - 'byval' attribute
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/// Bit 5 - 'nest' attribute
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/// Bit 6-9 - alignment of byval structures
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/// Bit 10-26 - size of byval structures
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/// Bits 31:27 - argument ABI alignment in the first argument piece and
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/// Bits 31:27 - argument ABI alignment in the first argument piece and
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/// alignment '1' in other argument pieces.
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/// alignment '1' in other argument pieces.
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CALL,
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CALL,
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@@ -28,6 +28,17 @@ CCState::CCState(unsigned CC, bool isVarArg, const TargetMachine &tm,
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UsedRegs.resize(MRI.getNumRegs());
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UsedRegs.resize(MRI.getNumRegs());
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}
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}
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void CCState::HandleStruct(unsigned ValNo, MVT::ValueType ValVT,
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MVT::ValueType LocVT, CCValAssign::LocInfo LocInfo,
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unsigned ArgFlags) {
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unsigned Align = 1 << ((ArgFlags & ISD::ParamFlags::ByValAlign) >>
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ISD::ParamFlags::ByValAlignOffs);
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unsigned Size = (ArgFlags & ISD::ParamFlags::ByValSize) >>
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ISD::ParamFlags::ByValSizeOffs;
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unsigned Offset = AllocateStack(Size, Align);
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addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
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}
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/// MarkAllocated - Mark a register and all of its aliases as allocated.
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/// MarkAllocated - Mark a register and all of its aliases as allocated.
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void CCState::MarkAllocated(unsigned Reg) {
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void CCState::MarkAllocated(unsigned Reg) {
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@@ -99,4 +110,3 @@ void CCState::AnalyzeCallResult(SDNode *TheCall, CCAssignFn Fn) {
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}
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}
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}
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}
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}
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}
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@@ -3836,8 +3836,15 @@ TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) {
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Flags |= ISD::ParamFlags::InReg;
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Flags |= ISD::ParamFlags::InReg;
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if (Attrs && Attrs->paramHasAttr(j, ParamAttr::StructRet))
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if (Attrs && Attrs->paramHasAttr(j, ParamAttr::StructRet))
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Flags |= ISD::ParamFlags::StructReturn;
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Flags |= ISD::ParamFlags::StructReturn;
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if (Attrs && Attrs->paramHasAttr(j, ParamAttr::ByVal))
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if (Attrs && Attrs->paramHasAttr(j, ParamAttr::ByVal)) {
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Flags |= ISD::ParamFlags::ByVal;
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Flags |= ISD::ParamFlags::ByVal;
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const PointerType *Ty = cast<PointerType>(I->getType());
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const StructType *STy = cast<StructType>(Ty->getElementType());
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unsigned StructAlign = Log2_32(getTargetData()->getABITypeAlignment(STy));
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unsigned StructSize = getTargetData()->getTypeSize(STy);
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Flags |= (StructAlign << ISD::ParamFlags::ByValAlignOffs);
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Flags |= (StructSize << ISD::ParamFlags::ByValSizeOffs);
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}
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if (Attrs && Attrs->paramHasAttr(j, ParamAttr::Nest))
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if (Attrs && Attrs->paramHasAttr(j, ParamAttr::Nest))
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Flags |= ISD::ParamFlags::Nest;
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Flags |= ISD::ParamFlags::Nest;
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Flags |= (OriginalAlignment << ISD::ParamFlags::OrigAlignmentOffs);
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Flags |= (OriginalAlignment << ISD::ParamFlags::OrigAlignmentOffs);
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@@ -1260,7 +1260,12 @@ X86TargetLowering::LowerX86_64CCCArguments(SDOperand Op, SelectionDAG &DAG) {
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int FI = MFI->CreateFixedObject(MVT::getSizeInBits(VA.getValVT())/8,
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int FI = MFI->CreateFixedObject(MVT::getSizeInBits(VA.getValVT())/8,
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VA.getLocMemOffset());
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VA.getLocMemOffset());
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SDOperand FIN = DAG.getFrameIndex(FI, getPointerTy());
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SDOperand FIN = DAG.getFrameIndex(FI, getPointerTy());
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ArgValues.push_back(DAG.getLoad(VA.getValVT(), Root, FIN, NULL, 0));
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unsigned Flags = cast<ConstantSDNode>(Op.getOperand(3 + i))->getValue();
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if (Flags & ISD::ParamFlags::ByVal)
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ArgValues.push_back(FIN);
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else
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ArgValues.push_back(DAG.getLoad(VA.getValVT(), Root, FIN, NULL, 0));
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}
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}
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}
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}
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@@ -130,7 +130,9 @@ void CallingConvEmitter::EmitAction(Record *Action,
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<< IndentStr << "else\n"
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<< IndentStr << "else\n"
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<< IndentStr << IndentStr << "LocInfo = CCValAssign::AExt;\n";
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<< IndentStr << IndentStr << "LocInfo = CCValAssign::AExt;\n";
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} else if (Action->isSubClassOf("CCStructAssign")) {
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} else if (Action->isSubClassOf("CCStructAssign")) {
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O << "assert(0 && \"Not Implemented\");\n";
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O << IndentStr <<
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"State.HandleStruct(ValNo, ValVT, LocVT, LocInfo, ArgFlags);\n";
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O << IndentStr << "return false;\n";
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} else {
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} else {
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Action->dump();
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Action->dump();
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throw "Unknown CCAction!";
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throw "Unknown CCAction!";
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