Handle composed subreg indices when processing REQ_SEQUENCE instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105066 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2010-05-29 00:14:14 +00:00
parent 82e0a1a1a8
commit 5a0d4fcb8d

View File

@ -1136,14 +1136,13 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
static void UpdateRegSequenceSrcs(unsigned SrcReg, static void UpdateRegSequenceSrcs(unsigned SrcReg,
unsigned DstReg, unsigned SubIdx, unsigned DstReg, unsigned SubIdx,
MachineRegisterInfo *MRI) { MachineRegisterInfo *MRI,
const TargetRegisterInfo &TRI) {
for (MachineRegisterInfo::reg_iterator RI = MRI->reg_begin(SrcReg), for (MachineRegisterInfo::reg_iterator RI = MRI->reg_begin(SrcReg),
RE = MRI->reg_end(); RI != RE; ) { RE = MRI->reg_end(); RI != RE; ) {
MachineOperand &MO = RI.getOperand(); MachineOperand &MO = RI.getOperand();
++RI; ++RI;
MO.setReg(DstReg); MO.substVirtReg(DstReg, SubIdx, TRI);
assert(MO.getSubReg() == 0);
MO.setSubReg(SubIdx);
} }
} }
@ -1315,7 +1314,7 @@ bool TwoAddressInstructionPass::EliminateRegSequences() {
for (unsigned i = 1, e = MI->getNumOperands(); i < e; i += 2) { for (unsigned i = 1, e = MI->getNumOperands(); i < e; i += 2) {
unsigned SrcReg = MI->getOperand(i).getReg(); unsigned SrcReg = MI->getOperand(i).getReg();
unsigned SubIdx = MI->getOperand(i+1).getImm(); unsigned SubIdx = MI->getOperand(i+1).getImm();
UpdateRegSequenceSrcs(SrcReg, DstReg, SubIdx, MRI); UpdateRegSequenceSrcs(SrcReg, DstReg, SubIdx, MRI, *TRI);
} }
if (IsImpDef) { if (IsImpDef) {