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Missed a couple redundant explicit type casts.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24684 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2005-12-13 00:25:07 +00:00
parent 9b6b642647
commit 5a38e0210d
1 changed files with 3 additions and 3 deletions
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6
lib/Target/X86/X86InstrInfo.td
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@ -354,15 +354,15 @@ def OUT32rr : I<0xEF, RawFrm, (ops),
def OUT8ir : Ii8<0xE6, RawFrm, (ops i16i8imm:$port),
"out{b} {%al, $port|$port, %AL}",
[(writeport AL, (i16 i16immZExt8:$port))]>,
[(writeport AL, i16immZExt8:$port)]>,
Imp<[AL], []>;
def OUT16ir : Ii8<0xE7, RawFrm, (ops i16i8imm:$port),
"out{w} {%ax, $port|$port, %AX}",
[(writeport AX, (i16 i16immZExt8:$port))]>,
[(writeport AX, i16immZExt8:$port)]>,
Imp<[AX], []>, OpSize;
def OUT32ir : Ii8<0xE7, RawFrm, (ops i16i8imm:$port),
"out{l} {%eax, $port|$port, %EAX}",
[(writeport EAX, (i16 i16immZExt8:$port))]>,
[(writeport EAX, i16immZExt8:$port)]>,
Imp<[EAX], []>;
//===----------------------------------------------------------------------===//