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80-col.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108420 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -371,7 +371,7 @@ public:
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unsigned SrcReg, bool isKill, int FrameIndex,
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const TargetRegisterClass *RC,
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const TargetRegisterInfo *TRI) const {
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assert(0 && "Target didn't implement TargetInstrInfo::storeRegToStackSlot!");
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assert(0 && "Target didn't implement TargetInstrInfo::storeRegToStackSlot!");
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}
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/// loadRegFromStackSlot - Load the specified register of the given register
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@ -383,7 +383,7 @@ public:
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unsigned DestReg, int FrameIndex,
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const TargetRegisterClass *RC,
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const TargetRegisterInfo *TRI) const {
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assert(0 && "Target didn't implement TargetInstrInfo::loadRegFromStackSlot!");
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assert(0 && "Target didn't implement TargetInstrInfo::loadRegFromStackSlot!");
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}
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/// spillCalleeSavedRegisters - Issues instruction(s) to spill all callee
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@ -392,7 +392,7 @@ public:
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/// storeRegToStackSlot(). Returns false otherwise.
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virtual bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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const std::vector<CalleeSavedInfo> &CSI,
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const std::vector<CalleeSavedInfo> &CSI,
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const TargetRegisterInfo *TRI) const {
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return false;
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}
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@ -457,7 +457,7 @@ protected:
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/// take care of adding a MachineMemOperand to the newly created instruction.
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virtual MachineInstr* foldMemoryOperandImpl(MachineFunction &MF,
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MachineInstr* MI,
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const SmallVectorImpl<unsigned> &Ops,
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const SmallVectorImpl<unsigned> &Ops,
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MachineInstr* LoadMI) const {
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return 0;
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}
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@ -501,7 +501,7 @@ public:
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/// only differences between the two addresses are the offset. It also returns
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/// the offsets by reference.
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virtual bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2,
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int64_t &Offset1, int64_t &Offset2) const {
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int64_t &Offset1, int64_t &Offset2) const {
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return false;
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}
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