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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108420 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher 2010-07-15 07:49:30 +00:00
parent 7fa889b946
commit 5a3eb8f0e1
1 changed files with 5 additions and 5 deletions
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10
include/llvm/Target/TargetInstrInfo.h
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@ -371,7 +371,7 @@ public:
unsigned SrcReg, bool isKill, int FrameIndex, unsigned SrcReg, bool isKill, int FrameIndex,
const TargetRegisterClass *RC, const TargetRegisterClass *RC,
const TargetRegisterInfo *TRI) const { const TargetRegisterInfo *TRI) const {
assert(0 && "Target didn't implement TargetInstrInfo::storeRegToStackSlot!"); assert(0 && "Target didn't implement TargetInstrInfo::storeRegToStackSlot!");
} }
/// loadRegFromStackSlot - Load the specified register of the given register /// loadRegFromStackSlot - Load the specified register of the given register
@ -383,7 +383,7 @@ public:
unsigned DestReg, int FrameIndex, unsigned DestReg, int FrameIndex,
const TargetRegisterClass *RC, const TargetRegisterClass *RC,
const TargetRegisterInfo *TRI) const { const TargetRegisterInfo *TRI) const {
assert(0 && "Target didn't implement TargetInstrInfo::loadRegFromStackSlot!"); assert(0 && "Target didn't implement TargetInstrInfo::loadRegFromStackSlot!");
} }
/// spillCalleeSavedRegisters - Issues instruction(s) to spill all callee /// spillCalleeSavedRegisters - Issues instruction(s) to spill all callee
@ -392,7 +392,7 @@ public:
/// storeRegToStackSlot(). Returns false otherwise. /// storeRegToStackSlot(). Returns false otherwise.
virtual bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, virtual bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI, MachineBasicBlock::iterator MI,
const std::vector<CalleeSavedInfo> &CSI, const std::vector<CalleeSavedInfo> &CSI,
const TargetRegisterInfo *TRI) const { const TargetRegisterInfo *TRI) const {
return false; return false;
} }
@ -457,7 +457,7 @@ protected:
/// take care of adding a MachineMemOperand to the newly created instruction. /// take care of adding a MachineMemOperand to the newly created instruction.
virtual MachineInstr* foldMemoryOperandImpl(MachineFunction &MF, virtual MachineInstr* foldMemoryOperandImpl(MachineFunction &MF,
MachineInstr* MI, MachineInstr* MI,
const SmallVectorImpl<unsigned> &Ops, const SmallVectorImpl<unsigned> &Ops,
MachineInstr* LoadMI) const { MachineInstr* LoadMI) const {
return 0; return 0;
} }
@ -501,7 +501,7 @@ public:
/// only differences between the two addresses are the offset. It also returns /// only differences between the two addresses are the offset. It also returns
/// the offsets by reference. /// the offsets by reference.
virtual bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, virtual bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2,
int64_t &Offset1, int64_t &Offset2) const { int64_t &Offset1, int64_t &Offset2) const {
return false; return false;
} }