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Finegrainify namespacification

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Remove one of the operands of a two operand instruction


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11478 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2004-02-15 21:38:28 +00:00
parent 859a18b583
commit 5aaf1d2820
1 changed files with 12 additions and 8 deletions
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20
lib/CodeGen/RegAllocSimple.cpp
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@ -25,8 +25,7 @@
#include "Support/Debug.h"
#include "Support/Statistic.h"
#include <iostream>
namespace llvm {
using namespace llvm;
namespace {
Statistic<> NumSpilled ("ra-simple", "Number of registers spilled");
@ -183,7 +182,9 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
unsigned physReg = Virt2PhysRegMap[virtualReg];
if (physReg == 0) {
if (op.isDef()) {
if (TM->getInstrInfo().isTwoAddrInstr(MI->getOpcode()) && i == 0) {
if (!TM->getInstrInfo().isTwoAddrInstr(MI->getOpcode()) || i) {
physReg = getFreeReg(virtualReg);
} else {
// must be same register number as the first operand
// This maps a = b + c into b += c, and saves b into a's spot
assert(MI->getOperand(1).isRegister() &&
@ -192,8 +193,13 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
"Two address instruction invalid!");
physReg = MI->getOperand(1).getReg();
} else {
physReg = getFreeReg(virtualReg);
++MI;
spillVirtReg(MBB, MI, virtualReg, physReg);
--MI;
MI->getOperand(1).setDef();
MI->RemoveOperand(0);
break; // This is the last operand to process
}
++MI;
spillVirtReg(MBB, MI, virtualReg, physReg);
@ -231,8 +237,6 @@ bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
return true;
}
FunctionPass *createSimpleRegisterAllocator() {
FunctionPass *llvm::createSimpleRegisterAllocator() {
return new RegAllocSimple();
}
} // End llvm namespace