diff --git a/lib/Target/R600/SIInstructions.td b/lib/Target/R600/SIInstructions.td index e8ed2dd5da4..9c96c080c08 100644 --- a/lib/Target/R600/SIInstructions.td +++ b/lib/Target/R600/SIInstructions.td @@ -1638,6 +1638,10 @@ defm : MUBUFLoad_Pattern ; defm : MUBUFLoad_Pattern ; +defm : MUBUFLoad_Pattern ; +defm : MUBUFLoad_Pattern ; multiclass MUBUFStore_Pattern { @@ -1654,6 +1658,7 @@ multiclass MUBUFStore_Pattern { defm : MUBUFStore_Pattern ; defm : MUBUFStore_Pattern ; +defm : MUBUFStore_Pattern ; defm : MUBUFStore_Pattern ; /********** ====================== **********/ diff --git a/test/CodeGen/R600/load.vec.ll b/test/CodeGen/R600/load.vec.ll new file mode 100644 index 00000000000..08e034e4562 --- /dev/null +++ b/test/CodeGen/R600/load.vec.ll @@ -0,0 +1,19 @@ +; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck --check-prefix=SI-CHECK %s + +; load a v2i32 value from the global address space. +; SI-CHECK: @load_v2i32 +; SI-CHECK: BUFFER_LOAD_DWORDX2 VGPR{{[0-9]+}} +define void @load_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) { + %a = load <2 x i32> addrspace(1) * %in + store <2 x i32> %a, <2 x i32> addrspace(1)* %out + ret void +} + +; load a v4i32 value from the global address space. +; SI-CHECK: @load_v4i32 +; SI-CHECK: BUFFER_LOAD_DWORDX4 VGPR{{[0-9]+}} +define void @load_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) { + %a = load <4 x i32> addrspace(1) * %in + store <4 x i32> %a, <4 x i32> addrspace(1)* %out + ret void +}