Between scheduling regions, correctly maintain anti-dep breaking state so that we don't incorrectly rename registers that span these regions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85537 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
David Goodwin 2009-10-29 23:30:59 +00:00
parent 6c1de1830b
commit 5b3c308970

View File

@ -195,8 +195,14 @@ void AggressiveAntiDepBreaker::Observe(MachineInstr *MI, unsigned Count,
unsigned InsertPosIndex) {
assert(Count < InsertPosIndex && "Instruction index out of expected range!");
std::set<unsigned> PassthruRegs;
GetPassthruRegs(MI, PassthruRegs);
PrescanInstruction(MI, Count, PassthruRegs);
ScanInstruction(MI, Count);
DEBUG(errs() << "Observe: ");
DEBUG(MI->dump());
DEBUG(errs() << "\tRegs:");
unsigned *DefIndices = State->GetDefIndices();
for (unsigned Reg = 0; Reg != TargetRegisterInfo::FirstVirtualRegister; ++Reg) {
@ -215,11 +221,7 @@ void AggressiveAntiDepBreaker::Observe(MachineInstr *MI, unsigned Count,
DefIndices[Reg] = Count;
}
}
std::set<unsigned> PassthruRegs;
GetPassthruRegs(MI, PassthruRegs);
PrescanInstruction(MI, Count, PassthruRegs);
ScanInstruction(MI, Count);
DEBUG(errs() << '\n');
// We're starting a new schedule region so forget any saved state.
delete SavedState;