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Code Issues Projects Releases Wiki Activity

R600: Create an R600TargetMachine for pre-gcn GPUs

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No functinality change. R600TargetMachine inherits from
AMDGPUTargetMachine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228849 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tom Stellard 2015-02-11 17:11:50 +00:00
parent 946f5e91ef
commit 5b98db607b
2 changed files with 36 additions and 15 deletions
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39
lib/Target/R600/AMDGPUTargetMachine.cpp
View File

@ -39,7 +39,7 @@ using namespace llvm;
extern "C" void LLVMInitializeR600Target() {
// Register the target
RegisterTargetMachine<AMDGPUTargetMachine> X(TheAMDGPUTarget);
RegisterTargetMachine<R600TargetMachine> X(TheAMDGPUTarget);
RegisterTargetMachine<GCNTargetMachine> Y(TheGCNTarget);
}
@ -83,6 +83,29 @@ AMDGPUTargetMachine::~AMDGPUTargetMachine() {
delete TLOF;
}
//===----------------------------------------------------------------------===//
// R600 Target Machine (R600 -> Cayman)
//===----------------------------------------------------------------------===//
R600TargetMachine::R600TargetMachine(const Target &T, StringRef TT, StringRef FS,
StringRef CPU, TargetOptions Options, Reloc::Model RM,
CodeModel::Model CM, CodeGenOpt::Level OL) :
AMDGPUTargetMachine(T, TT, FS, CPU, Options, RM, CM, OL) { }
//===----------------------------------------------------------------------===//
// GCN Target Machine (SI+)
//===----------------------------------------------------------------------===//
GCNTargetMachine::GCNTargetMachine(const Target &T, StringRef TT, StringRef FS,
StringRef CPU, TargetOptions Options, Reloc::Model RM,
CodeModel::Model CM, CodeGenOpt::Level OL) :
AMDGPUTargetMachine(T, TT, FS, CPU, Options, RM, CM, OL) { }
//===----------------------------------------------------------------------===//
// AMDGPU Pass Setup
//===----------------------------------------------------------------------===//
namespace {
class AMDGPUPassConfig : public TargetPassConfig {
public:
@ -116,10 +139,6 @@ TargetPassConfig *AMDGPUTargetMachine::createPassConfig(PassManagerBase &PM) {
return new AMDGPUPassConfig(this, PM);
}
//===----------------------------------------------------------------------===//
// AMDGPU Pass Setup
//===----------------------------------------------------------------------===//
TargetIRAnalysis AMDGPUTargetMachine::getTargetIRAnalysis() {
return TargetIRAnalysis(
[this](Function &F) { return TargetTransformInfo(AMDGPUTTIImpl(this)); });
@ -234,13 +253,3 @@ void AMDGPUPassConfig::addPreEmitPass() {
addPass(createSILowerControlFlowPass(*TM), false);
}
}
//===----------------------------------------------------------------------===//
// GCN Target Machine (SI+)
//===----------------------------------------------------------------------===//
GCNTargetMachine::GCNTargetMachine(const Target &T, StringRef TT, StringRef FS,
StringRef CPU, TargetOptions Options, Reloc::Model RM,
CodeModel::Model CM, CodeGenOpt::Level OL) :
AMDGPUTargetMachine(T, TT, FS, CPU, Options, RM, CM, OL) { }

12
lib/Target/R600/AMDGPUTargetMachine.h
View File

@ -62,6 +62,18 @@ public:
}
};
//===----------------------------------------------------------------------===//
// R600 Target Machine (R600 -> Cayman)
//===----------------------------------------------------------------------===//
class R600TargetMachine : public AMDGPUTargetMachine {
public:
R600TargetMachine(const Target &T, StringRef TT, StringRef FS,
StringRef CPU, TargetOptions Options, Reloc::Model RM,
CodeModel::Model CM, CodeGenOpt::Level OL);
};
//===----------------------------------------------------------------------===//
// GCN Target Machine (SI+)
//===----------------------------------------------------------------------===//