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Let target asm backends see assembler flags as they go by. Use that to handle

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thumb vs. arm mode differences in WriteNopData().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121219 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2010-12-08 01:16:55 +00:00
parent 1b19dc1d8b
commit 5be6d2af38
3 changed files with 36 additions and 5 deletions
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5
include/llvm/Target/TargetAsmBackend.h
View File

@ -10,6 +10,7 @@
#ifndef LLVM_TARGET_TARGETASMBACKEND_H
#define LLVM_TARGET_TARGETASMBACKEND_H
#include "llvm/MC/MCDirectives.h"
#include "llvm/Support/DataTypes.h"
namespace llvm {
@ -109,6 +110,10 @@ public:
///
/// \return - True on success.
virtual bool WriteNopData(uint64_t Count, MCObjectWriter *OW) const = 0;
/// HandleAssemblerFlag - Handle any target-specific assembler flags.
/// By default, do nothing.
virtual void HandleAssemblerFlag(MCAssemblerFlag Flag) {}
};
} // End llvm namespace

3
lib/MC/MCMachOStreamer.cpp
View File

@ -124,6 +124,9 @@ void MCMachOStreamer::EmitLabel(MCSymbol *Symbol) {
}
void MCMachOStreamer::EmitAssemblerFlag(MCAssemblerFlag Flag) {
// Let the target do whatever target specific stuff it needs to do.
getAssembler().getBackend().HandleAssemblerFlag(Flag);
// Do any generic stuff we need to do.
switch (Flag) {
case MCAF_SyntaxUnified: return; // no-op here.
case MCAF_Code16: return; // no-op here.

33
lib/Target/ARM/ARMAsmBackend.cpp
View File

@ -12,6 +12,7 @@
#include "ARMFixupKinds.h"
#include "llvm/ADT/Twine.h"
#include "llvm/MC/MCAssembler.h"
#include "llvm/MC/MCDirectives.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCObjectFormat.h"
#include "llvm/MC/MCObjectWriter.h"
@ -27,6 +28,7 @@ using namespace llvm;
namespace {
class ARMAsmBackend : public TargetAsmBackend {
bool isThumbMode; // Currently emitting Thumb code.
public:
ARMAsmBackend(const Target &T) : TargetAsmBackend() {}
@ -36,9 +38,21 @@ public:
bool WriteNopData(uint64_t Count, MCObjectWriter *OW) const;
unsigned getPointerSize() const {
return 4;
void HandleAssemblerFlag(MCAssemblerFlag Flag) {
switch (Flag) {
default: break;
case MCAF_Code16:
setIsThumb(true);
break;
case MCAF_Code32:
setIsThumb(false);
break;
}
}
unsigned getPointerSize() const { return 4; }
bool isThumb() const { return isThumbMode; }
void setIsThumb(bool it) { isThumbMode = it; }
};
} // end anonymous namespace
@ -53,10 +67,19 @@ void ARMAsmBackend::RelaxInstruction(const MCInst &Inst, MCInst &Res) const {
}
bool ARMAsmBackend::WriteNopData(uint64_t Count, MCObjectWriter *OW) const {
// FIXME: Zero fill for now. That's not right, but at least will get the
// section size right.
if (isThumb()) {
assert (((Count & 1) == 0) && "Unaligned Nop data fragment!");
// FIXME: 0xbf00 is the ARMv7 value. For v6 and before, we'll need to
// use 0x46c0 (which is a 'mov r8, r8' insn).
Count /= 2;
for (uint64_t i = 0; i != Count; ++i)
OW->Write16(0xbf00);
return true;
}
// ARM mode
Count /= 4;
for (uint64_t i = 0; i != Count; ++i)
OW->Write8(0);
OW->Write32(0xe1a00000);
return true;
}