diff --git a/lib/Target/SparcV9/SparcV9Internals.h b/lib/Target/SparcV9/SparcV9Internals.h
index 41a75474087..29ab1f3b72c 100644
--- a/lib/Target/SparcV9/SparcV9Internals.h
+++ b/lib/Target/SparcV9/SparcV9Internals.h
@@ -630,12 +630,6 @@ struct UltraSparcCacheInfo: public TargetCacheInfo {
 };
 
 
-/// createAddRegNumToValuesPass - this pass adds unsigned register numbers to
-/// instructions, since that's not done by the Sparc InstSelector, but that's
-/// how the target-independent register allocator in the JIT likes to see
-/// instructions. This pass enables the usage of the JIT register allocator(s).
-Pass *createAddRegNumToValuesPass();
-
 /// createStackSlotsPass - External interface to stack-slots pass that enters 2
 /// empty slots at the top of each function stack
 Pass *createStackSlotsPass(const TargetMachine &TM);
diff --git a/lib/Target/SparcV9/SparcV9TargetMachine.cpp b/lib/Target/SparcV9/SparcV9TargetMachine.cpp
index f1742ec0071..738413fc599 100644
--- a/lib/Target/SparcV9/SparcV9TargetMachine.cpp
+++ b/lib/Target/SparcV9/SparcV9TargetMachine.cpp
@@ -254,10 +254,6 @@ bool UltraSparc::addPassesToJITCompile(FunctionPassManager &PM) {
 
   PM.add(createInstructionSelectionPass(*this));
 
-  // new pass: convert Value* in MachineOperand to an unsigned register
-  // this brings it in line with what the X86 JIT's RegisterAllocator expects
-  //PM.add(createAddRegNumToValuesPass());
-
   PM.add(getRegisterAllocator(*this));
   PM.add(getPrologEpilogInsertionPass());