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Don't crash on variable insertelement on ARM. PR10258.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142871 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -108,6 +108,7 @@ void ARMTargetLowering::addTypeForNEON(EVT VT, EVT PromotedLdStVT,
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EVT ElemTy = VT.getVectorElementType();
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if (ElemTy != MVT::i64 && ElemTy != MVT::f64)
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setOperationAction(ISD::SETCC, VT.getSimpleVT(), Custom);
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setOperationAction(ISD::INSERT_VECTOR_ELT, VT.getSimpleVT(), Custom);
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setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT.getSimpleVT(), Custom);
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if (ElemTy != MVT::i32) {
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setOperationAction(ISD::SINT_TO_FP, VT.getSimpleVT(), Expand);
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@ -4453,6 +4454,15 @@ static SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) {
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return SDValue();
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}
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static SDValue LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) {
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// INSERT_VECTOR_ELT is legal only for immediate indexes.
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SDValue Lane = Op.getOperand(2);
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if (!isa<ConstantSDNode>(Lane))
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return SDValue();
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return Op;
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}
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static SDValue LowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) {
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// EXTRACT_VECTOR_ELT is legal only for immediate indexes.
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SDValue Lane = Op.getOperand(1);
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@ -4975,6 +4985,7 @@ SDValue ARMTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
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case ISD::SETCC: return LowerVSETCC(Op, DAG);
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case ISD::BUILD_VECTOR: return LowerBUILD_VECTOR(Op, DAG, Subtarget);
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case ISD::VECTOR_SHUFFLE: return LowerVECTOR_SHUFFLE(Op, DAG);
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case ISD::INSERT_VECTOR_ELT: return LowerINSERT_VECTOR_ELT(Op, DAG);
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case ISD::EXTRACT_VECTOR_ELT: return LowerEXTRACT_VECTOR_ELT(Op, DAG);
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case ISD::CONCAT_VECTORS: return LowerCONCAT_VECTORS(Op, DAG);
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case ISD::FLT_ROUNDS_: return LowerFLT_ROUNDS_(Op, DAG);
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@ -358,6 +358,13 @@ define void @vst4laneQf(float* %A, <4 x float>* %B) nounwind {
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ret void
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}
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; Make sure this doesn't crash; PR10258
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define <8 x i16> @variable_insertelement(<8 x i16> %a, i16 %b, i32 %c) nounwind readnone {
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;CHECK: variable_insertelement:
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%r = insertelement <8 x i16> %a, i16 %b, i32 %c
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ret <8 x i16> %r
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}
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declare void @llvm.arm.neon.vst4lane.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, i32, i32) nounwind
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declare void @llvm.arm.neon.vst4lane.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>, i32, i32) nounwind
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declare void @llvm.arm.neon.vst4lane.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32, i32) nounwind
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