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Wording.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110618 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1169,7 +1169,7 @@ def MOV32cr : I<0x22, MRMSrcReg, (outs CONTROL_REG:$dst), (ins GR32:$src),
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// Extra precision multiplication
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// AL is really implied by AX, by the registers in Defs must match the
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// AL is really implied by AX, but the registers in Defs must match the
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// SDNode results (i8, i32).
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let Defs = [AL,EFLAGS,AX], Uses = [AL] in
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def MUL8r : I<0xF6, MRM4r, (outs), (ins GR8:$src), "mul{b}\t$src",
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