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Add a vector to keep track of which registers are allocatable. Remove FIXMEs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6015 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1,7 +1,22 @@
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//===-- LiveVariables.cpp - Live Variable Analysis for Machine Code -------===//
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//
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// This file implements the LiveVariable analysis pass.
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//
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// This file implements the LiveVariable analysis pass. For each machine
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// instruction in the function, this pass calculates the set of registers that
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// are immediately dead after the instruction (i.e., the instruction calculates
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// the value, but it is never used) and the set of registers that are used by
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// the instruction, but are never used after the instruction (i.e., they are
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// killed).
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//
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// This class computes live variables using are sparse implementation based on
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// the machine code SSA form. This class computes live variable information for
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// each virtual and _register allocatable_ physical register in a function. It
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// uses the dominance properties of SSA form to efficiently compute live
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// variables for virtual registers, and assumes that physical registers are only
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// live within a single basic block (allowing it to do a single local analysis
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// to resolve physical register lifetimes in each basic block). If a physical
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// register is not register allocatable, it is not tracked. This is useful for
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// things like the stack pointer and condition codes.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/LiveVariables.h"
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@ -104,6 +119,23 @@ void LiveVariables::HandlePhysRegDef(unsigned Reg, MachineInstr *MI) {
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}
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bool LiveVariables::runOnMachineFunction(MachineFunction &MF) {
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// First time though, initialize AllocatablePhysicalRegisters for the target
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if (AllocatablePhysicalRegisters.empty()) {
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const MRegisterInfo &MRI = *MF.getTarget().getRegisterInfo();
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assert(&MRI && "Target doesn't have register information?");
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// Make space, initializing to false...
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AllocatablePhysicalRegisters.resize(MRegisterInfo::FirstVirtualRegister);
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// Loop over all of the register classes...
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for (MRegisterInfo::regclass_iterator RCI = MRI.regclass_begin(),
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E = MRI.regclass_end(); RCI != E; ++RCI)
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// Loop over all of the allocatable registers in the function...
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for (TargetRegisterClass::iterator I = (*RCI)->allocation_order_begin(MF),
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E = (*RCI)->allocation_order_end(MF); I != E; ++I)
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AllocatablePhysicalRegisters[*I] = true; // The reg is allocatable!
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}
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// Build BBMap...
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unsigned BBNum = 0;
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for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
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@ -165,12 +197,8 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &MF) {
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if (MO.isVirtualRegister() && !MO.getVRegValueOrNull()) {
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unsigned RegIdx = MO.getReg()-MRegisterInfo::FirstVirtualRegister;
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HandleVirtRegUse(getVarInfo(RegIdx), MBB, MI);
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} else if (MO.isPhysicalRegister() && MO.getReg() != 0
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/// FIXME: This is a gross hack, due to us not being able to
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/// say that some registers are defined on entry to the
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/// function. 5 = ESP
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&& MO.getReg() != 5
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) {
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} else if (MO.isPhysicalRegister() &&
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AllocatablePhysicalRegisters[MO.getReg()]) {
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HandlePhysRegUse(MO.getReg(), MI);
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}
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}
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@ -193,12 +221,8 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &MF) {
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VRInfo.DefBlock = MBB; // Created here...
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VRInfo.DefInst = MI;
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VRInfo.Kills.push_back(std::make_pair(MBB, MI)); // Defaults to dead
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} else if (MO.isPhysicalRegister() && MO.getReg() != 0
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/// FIXME: This is a gross hack, due to us not being able to
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/// say that some registers are defined on entry to the
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/// function. 5 = ESP
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&& MO.getReg() != 5
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) {
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} else if (MO.isPhysicalRegister() &&
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AllocatablePhysicalRegisters[MO.getReg()]) {
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HandlePhysRegDef(MO.getReg(), MI);
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}
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}
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