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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-01 15:11:24 +00:00
MC/Mach-O: Lift some MachObjectWriter arguments into the target specific
interface. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121981 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -11,15 +11,30 @@
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#define LLVM_MC_MCMACHOBJECTWRITER_H
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#include "llvm/MC/MCObjectWriter.h"
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#include "llvm/Support/DataTypes.h"
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namespace llvm {
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class MCMachObjectTargetWriter {
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const unsigned Is64Bit : 1;
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const uint32_t CPUType;
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const uint32_t CPUSubtype;
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protected:
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MCMachObjectTargetWriter();
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MCMachObjectTargetWriter(bool Is64Bit_, uint32_t CPUType_,
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uint32_t CPUSubtype_);
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public:
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virtual ~MCMachObjectTargetWriter();
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/// @name Accessors
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/// @{
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bool is64Bit() const { return Is64Bit; }
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uint32_t getCPUType() const { return CPUType; }
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uint32_t getCPUSubtype() const { return CPUSubtype; }
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/// @}
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};
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/// \brief Construct a new Mach-O writer instance.
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@ -30,9 +45,7 @@ public:
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/// \param OS - The stream to write to.
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/// \returns The constructed object writer.
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MCObjectWriter *createMachObjectWriter(MCMachObjectTargetWriter *MOTW,
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raw_ostream &OS, bool is64Bit,
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uint32_t CPUType, uint32_t CPUSubtype,
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bool IsLittleEndian);
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raw_ostream &OS, bool IsLittleEndian);
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} // End llvm namespace
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@ -11,7 +11,9 @@
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using namespace llvm;
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MCMachObjectTargetWriter::MCMachObjectTargetWriter() {
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MCMachObjectTargetWriter::MCMachObjectTargetWriter(
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bool Is64Bit_, uint32_t CPUType_, uint32_t CPUSubtype_)
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: Is64Bit(Is64Bit_), CPUType(CPUType_), CPUSubtype(CPUSubtype_) {
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}
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MCMachObjectTargetWriter::~MCMachObjectTargetWriter() {
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@ -225,19 +225,19 @@ private:
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return OffsetToAlignment(EndAddr, NextSD.getAlignment());
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}
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unsigned Is64Bit : 1;
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uint32_t CPUType;
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uint32_t CPUSubtype;
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public:
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MachObjectWriter(MCMachObjectTargetWriter *MOTW, raw_ostream &_OS,
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bool _Is64Bit, uint32_t _CPUType, uint32_t _CPUSubtype,
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bool _IsLittleEndian)
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: MCObjectWriter(_OS, _IsLittleEndian), TargetObjectWriter(MOTW),
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Is64Bit(_Is64Bit), CPUType(_CPUType), CPUSubtype(_CPUSubtype) {
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: MCObjectWriter(_OS, _IsLittleEndian), TargetObjectWriter(MOTW) {
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}
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/// @name Target Writer Proxy Accessors
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/// @{
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bool is64Bit() const { return TargetObjectWriter->is64Bit(); }
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/// @}
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void WriteHeader(unsigned NumLoadCommands, unsigned LoadCommandsSize,
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bool SubsectionsViaSymbols) {
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uint32_t Flags = 0;
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@ -251,19 +251,19 @@ public:
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uint64_t Start = OS.tell();
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(void) Start;
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Write32(Is64Bit ? macho::HM_Object64 : macho::HM_Object32);
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Write32(is64Bit() ? macho::HM_Object64 : macho::HM_Object32);
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Write32(CPUType);
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Write32(CPUSubtype);
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Write32(TargetObjectWriter->getCPUType());
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Write32(TargetObjectWriter->getCPUSubtype());
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Write32(macho::HFT_Object);
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Write32(NumLoadCommands);
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Write32(LoadCommandsSize);
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Write32(Flags);
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if (Is64Bit)
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if (is64Bit())
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Write32(0); // reserved
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assert(OS.tell() - Start == Is64Bit ?
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assert(OS.tell() - Start == is64Bit() ?
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macho::Header64Size : macho::Header32Size);
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}
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@ -281,15 +281,16 @@ public:
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uint64_t Start = OS.tell();
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(void) Start;
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unsigned SegmentLoadCommandSize = Is64Bit ? macho::SegmentLoadCommand64Size:
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unsigned SegmentLoadCommandSize =
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is64Bit() ? macho::SegmentLoadCommand64Size:
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macho::SegmentLoadCommand32Size;
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Write32(Is64Bit ? macho::LCT_Segment64 : macho::LCT_Segment);
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Write32(is64Bit() ? macho::LCT_Segment64 : macho::LCT_Segment);
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Write32(SegmentLoadCommandSize +
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NumSections * (Is64Bit ? macho::Section64Size :
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NumSections * (is64Bit() ? macho::Section64Size :
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macho::Section32Size));
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WriteBytes("", 16);
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if (Is64Bit) {
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if (is64Bit()) {
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Write64(0); // vmaddr
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Write64(VMSize); // vmsize
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Write64(SectionDataStartOffset); // file offset
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@ -328,7 +329,7 @@ public:
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const MCSectionMachO &Section = cast<MCSectionMachO>(SD.getSection());
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WriteBytes(Section.getSectionName(), 16);
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WriteBytes(Section.getSegmentName(), 16);
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if (Is64Bit) {
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if (is64Bit()) {
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Write64(getSectionAddress(&SD)); // address
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Write64(SectionSize); // size
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} else {
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@ -348,10 +349,10 @@ public:
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Write32(Flags);
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Write32(IndirectSymBase.lookup(&SD)); // reserved1
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Write32(Section.getStubSize()); // reserved2
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if (Is64Bit)
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if (is64Bit())
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Write32(0); // reserved3
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assert(OS.tell() - Start == Is64Bit ? macho::Section64Size :
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assert(OS.tell() - Start == is64Bit() ? macho::Section64Size :
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macho::Section32Size);
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}
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@ -469,7 +470,7 @@ public:
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// The Mach-O streamer uses the lowest 16-bits of the flags for the 'desc'
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// value.
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Write16(Flags);
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if (Is64Bit)
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if (is64Bit())
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Write64(Address);
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else
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Write32(Address);
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@ -798,7 +799,7 @@ public:
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const MCFixup &Fixup, MCValue Target,
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uint64_t &FixedValue) {
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assert(Target.getSymA()->getKind() == MCSymbolRefExpr::VK_TLVP &&
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!Is64Bit &&
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!is64Bit() &&
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"Should only be called with a 32-bit TLVP relocation!");
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unsigned Log2Size = getFixupKindLog2Size(Fixup.getKind());
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@ -840,7 +841,7 @@ public:
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void RecordRelocation(const MCAssembler &Asm, const MCAsmLayout &Layout,
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const MCFragment *Fragment, const MCFixup &Fixup,
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MCValue Target, uint64_t &FixedValue) {
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if (Is64Bit) {
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if (is64Bit()) {
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RecordX86_64Relocation(Asm, Layout, Fragment, Fixup, Target, FixedValue);
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return;
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}
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@ -1164,7 +1165,7 @@ public:
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// The section data starts after the header, the segment load command (and
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// section headers) and the symbol table.
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unsigned NumLoadCommands = 1;
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uint64_t LoadCommandsSize = Is64Bit ?
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uint64_t LoadCommandsSize = is64Bit() ?
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macho::SegmentLoadCommand64Size + NumSections * macho::Section64Size :
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macho::SegmentLoadCommand32Size + NumSections * macho::Section32Size;
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@ -1179,7 +1180,7 @@ public:
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// Compute the total size of the section data, as well as its file size and
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// vm size.
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uint64_t SectionDataStart = (Is64Bit ? macho::Header64Size :
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uint64_t SectionDataStart = (is64Bit() ? macho::Header64Size :
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macho::Header32Size) + LoadCommandsSize;
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uint64_t SectionDataSize = 0;
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uint64_t SectionDataFileSize = 0;
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@ -1247,7 +1248,7 @@ public:
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// The string table is written after symbol table.
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uint64_t StringTableOffset =
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SymbolTableOffset + NumSymTabSymbols * (Is64Bit ? macho::Nlist64Size :
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SymbolTableOffset + NumSymTabSymbols * (is64Bit() ? macho::Nlist64Size :
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macho::Nlist32Size);
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WriteSymtabLoadCommand(SymbolTableOffset, NumSymTabSymbols,
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StringTableOffset, StringTable.size());
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@ -1327,10 +1328,7 @@ public:
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}
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MCObjectWriter *llvm::createMachObjectWriter(MCMachObjectTargetWriter *MOTW,
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raw_ostream &OS, bool is64Bit,
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uint32_t CPUType,
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uint32_t CPUSubtype,
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raw_ostream &OS,
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bool IsLittleEndian) {
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return new MachObjectWriter(MOTW, OS, is64Bit, CPUType, CPUSubtype,
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IsLittleEndian);
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return new MachObjectWriter(MOTW, OS, IsLittleEndian);
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}
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@ -29,6 +29,10 @@ using namespace llvm;
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namespace {
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class ARMMachObjectWriter : public MCMachObjectTargetWriter {
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public:
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ARMMachObjectWriter(bool Is64Bit, uint32_t CPUType,
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uint32_t CPUSubtype)
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: MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype) {}
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};
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class ARMAsmBackend : public TargetAsmBackend {
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@ -385,10 +389,11 @@ public:
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MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
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// FIXME: Subtarget info should be derived. Force v7 for now.
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return createMachObjectWriter(new ARMMachObjectWriter,
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OS, /*Is64Bit=*/false,
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object::mach::CTM_ARM,
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object::mach::CSARM_V7,
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return createMachObjectWriter(new ARMMachObjectWriter(
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/*Is64Bit=*/false,
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object::mach::CTM_ARM,
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object::mach::CSARM_V7),
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OS,
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/*IsLittleEndian=*/true);
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}
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@ -20,6 +20,10 @@ using namespace llvm;
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namespace {
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class PPCMachObjectWriter : public MCMachObjectTargetWriter {
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public:
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PPCMachObjectWriter(bool Is64Bit, uint32_t CPUType,
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uint32_t CPUSubtype)
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: MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype) {}
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};
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class PPCAsmBackend : public TargetAsmBackend {
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@ -95,12 +99,12 @@ namespace {
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MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
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bool is64 = getPointerSize() == 8;
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return createMachObjectWriter(new PPCMachObjectWriter,
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OS, /*Is64Bit=*/is64,
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(is64 ? object::mach::CTM_PowerPC64 :
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object::mach::CTM_PowerPC),
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object::mach::CSPPC_ALL,
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/*IsLittleEndian=*/false);
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return createMachObjectWriter(new PPCMachObjectWriter(
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/*Is64Bit=*/is64,
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(is64 ? object::mach::CTM_PowerPC64 :
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object::mach::CTM_PowerPC),
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object::mach::CSPPC_ALL),
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OS, /*IsLittleEndian=*/false);
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}
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virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
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@ -47,6 +47,10 @@ static unsigned getFixupKindLog2Size(unsigned Kind) {
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namespace {
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class X86MachObjectWriter : public MCMachObjectTargetWriter {
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public:
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X86MachObjectWriter(bool Is64Bit, uint32_t CPUType,
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uint32_t CPUSubtype)
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: MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype) {}
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};
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class X86AsmBackend : public TargetAsmBackend {
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@ -365,11 +369,11 @@ public:
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: DarwinX86AsmBackend(T) {}
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MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
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return createMachObjectWriter(new X86MachObjectWriter,
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OS, /*Is64Bit=*/false,
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object::mach::CTM_i386,
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object::mach::CSX86_ALL,
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/*IsLittleEndian=*/true);
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return createMachObjectWriter(new X86MachObjectWriter(
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/*Is64Bit=*/false,
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object::mach::CTM_i386,
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object::mach::CSX86_ALL),
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OS, /*IsLittleEndian=*/true);
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}
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};
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@ -381,11 +385,11 @@ public:
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}
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MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
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return createMachObjectWriter(new X86MachObjectWriter,
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OS, /*Is64Bit=*/true,
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object::mach::CTM_x86_64,
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object::mach::CSX86_ALL,
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/*IsLittleEndian=*/true);
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return createMachObjectWriter(new X86MachObjectWriter(
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/*Is64Bit=*/true,
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object::mach::CTM_x86_64,
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object::mach::CSX86_ALL),
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OS, /*IsLittleEndian=*/true);
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}
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virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
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