mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-10 02:36:06 +00:00
Use RegisterClassInfo::getOrder in RAFast.
This saves two virtual function calls and an Allocatable BitVector test, making RAFast run 2% faster. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132471 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
6f888a80d5
commit
5d20c3152b
@ -13,6 +13,7 @@
|
|||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
#define DEBUG_TYPE "regalloc"
|
#define DEBUG_TYPE "regalloc"
|
||||||
|
#include "RegisterClassInfo.h"
|
||||||
#include "llvm/BasicBlock.h"
|
#include "llvm/BasicBlock.h"
|
||||||
#include "llvm/CodeGen/MachineFunctionPass.h"
|
#include "llvm/CodeGen/MachineFunctionPass.h"
|
||||||
#include "llvm/CodeGen/MachineInstr.h"
|
#include "llvm/CodeGen/MachineInstr.h"
|
||||||
@ -58,6 +59,7 @@ namespace {
|
|||||||
MachineRegisterInfo *MRI;
|
MachineRegisterInfo *MRI;
|
||||||
const TargetRegisterInfo *TRI;
|
const TargetRegisterInfo *TRI;
|
||||||
const TargetInstrInfo *TII;
|
const TargetInstrInfo *TII;
|
||||||
|
RegisterClassInfo RegClassInfo;
|
||||||
|
|
||||||
// Basic block currently being allocated.
|
// Basic block currently being allocated.
|
||||||
MachineBasicBlock *MBB;
|
MachineBasicBlock *MBB;
|
||||||
@ -499,14 +501,12 @@ void RAFast::allocVirtReg(MachineInstr *MI, LiveRegEntry &LRE, unsigned Hint) {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
TargetRegisterClass::iterator AOB = RC->allocation_order_begin(*MF);
|
ArrayRef<unsigned> AO = RegClassInfo.getOrder(RC);
|
||||||
TargetRegisterClass::iterator AOE = RC->allocation_order_end(*MF);
|
|
||||||
|
|
||||||
// First try to find a completely free register.
|
// First try to find a completely free register.
|
||||||
for (TargetRegisterClass::iterator I = AOB; I != AOE; ++I) {
|
for (ArrayRef<unsigned>::iterator I = AO.begin(), E = AO.end(); I != E; ++I) {
|
||||||
unsigned PhysReg = *I;
|
unsigned PhysReg = *I;
|
||||||
if (PhysRegState[PhysReg] == regFree && !UsedInInstr.test(PhysReg) &&
|
if (PhysRegState[PhysReg] == regFree && !UsedInInstr.test(PhysReg))
|
||||||
Allocatable.test(PhysReg))
|
|
||||||
return assignVirtToPhysReg(LRE, PhysReg);
|
return assignVirtToPhysReg(LRE, PhysReg);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -514,11 +514,7 @@ void RAFast::allocVirtReg(MachineInstr *MI, LiveRegEntry &LRE, unsigned Hint) {
|
|||||||
<< RC->getName() << "\n");
|
<< RC->getName() << "\n");
|
||||||
|
|
||||||
unsigned BestReg = 0, BestCost = spillImpossible;
|
unsigned BestReg = 0, BestCost = spillImpossible;
|
||||||
for (TargetRegisterClass::iterator I = AOB; I != AOE; ++I) {
|
for (ArrayRef<unsigned>::iterator I = AO.begin(), E = AO.end(); I != E; ++I) {
|
||||||
if (!Allocatable.test(*I)) {
|
|
||||||
DEBUG(dbgs() << "\tRegister " << *I << " is not allocatable.\n");
|
|
||||||
continue;
|
|
||||||
}
|
|
||||||
unsigned Cost = calcSpillCost(*I);
|
unsigned Cost = calcSpillCost(*I);
|
||||||
DEBUG(dbgs() << "\tRegister: " << *I << "\n");
|
DEBUG(dbgs() << "\tRegister: " << *I << "\n");
|
||||||
DEBUG(dbgs() << "\tCost: " << Cost << "\n");
|
DEBUG(dbgs() << "\tCost: " << Cost << "\n");
|
||||||
@ -1048,6 +1044,7 @@ bool RAFast::runOnMachineFunction(MachineFunction &Fn) {
|
|||||||
TM = &Fn.getTarget();
|
TM = &Fn.getTarget();
|
||||||
TRI = TM->getRegisterInfo();
|
TRI = TM->getRegisterInfo();
|
||||||
TII = TM->getInstrInfo();
|
TII = TM->getInstrInfo();
|
||||||
|
RegClassInfo.runOnMachineFunction(Fn);
|
||||||
|
|
||||||
UsedInInstr.resize(TRI->getNumRegs());
|
UsedInInstr.resize(TRI->getNumRegs());
|
||||||
Allocatable = TRI->getAllocatableSet(*MF);
|
Allocatable = TRI->getAllocatableSet(*MF);
|
||||||
|
Loading…
x
Reference in New Issue
Block a user