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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131455 91177308-0d34-0410-b5e6-96231b3b80d8
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Chris Lattner 2011-05-17 07:22:33 +00:00
parent 71753050b1
commit 5d4718b1c7
1 changed files with 26 additions and 0 deletions
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26
lib/Target/X86/README.txt
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@ -2040,3 +2040,29 @@ _clamp2: ## @clamp2
The move of 0 could be scheduled above the test to make it is xor reg,reg.
//===---------------------------------------------------------------------===//
GCC PR48986. We currently compile this:
void bar(void);
void yyy(int* p) {
if (__sync_fetch_and_add(p, -1) == 1)
bar();
}
into:
movl $-1, %eax
lock
xaddl %eax, (%rdi)
cmpl $1, %eax
je LBB0_2
Instead we could generate:
lock
dec %rdi
je LBB0_2
The trick is to match "fetch_and_add(X, -C) == C".
//===---------------------------------------------------------------------===//