[FastISel][AArch64] Use the correct register class to make the MI verifier happy.

This is mostly achieved by providing the correct register class manually,
because getRegClassFor always returns the GPR*AllRegClass for MVT::i32 and
MVT::i64.

Also cleanup the code to use the FastEmitInst_* method whenever possible. This
makes sure that the operands' register class is properly constrained. For all
the remaining cases this adds the missing constrainOperandRegClass calls for
each operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216225 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Juergen Ributzka
2014-08-21 20:57:57 +00:00
parent 95ca0fb247
commit 5d6365c80c
28 changed files with 184 additions and 180 deletions

View File

@@ -1,4 +1,4 @@
; RUN: llc -fast-isel -fast-isel-abort < %s | FileCheck %s
; RUN: llc -fast-isel -fast-isel-abort -verify-machineinstrs < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-linux-gnu"