diff --git a/utils/TableGen/CodeGenInstruction.h b/utils/TableGen/CodeGenInstruction.h
index 669280c1bbc..cbf22db8219 100644
--- a/utils/TableGen/CodeGenInstruction.h
+++ b/utils/TableGen/CodeGenInstruction.h
@@ -81,7 +81,7 @@ namespace llvm {
     bool isCommutable;
     bool isTerminator;
     bool hasDelaySlot;
-    bool usesCustomDAGSChedInserter;
+    bool usesCustomDAGSchedInserter;
     bool hasVariableNumberOfOperands;
 
     CodeGenInstruction(Record *R, const std::string &AsmStr);
diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp
index 282a7ac5304..b3bb46db992 100644
--- a/utils/TableGen/CodeGenTarget.cpp
+++ b/utils/TableGen/CodeGenTarget.cpp
@@ -250,7 +250,7 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr)
   isCommutable = R->getValueAsBit("isCommutable");
   isTerminator = R->getValueAsBit("isTerminator");
   hasDelaySlot = R->getValueAsBit("hasDelaySlot");
-  usesCustomDAGSChedInserter = R->getValueAsBit("usesCustomDAGSChedInserter");
+  usesCustomDAGSchedInserter = R->getValueAsBit("usesCustomDAGSChedInserter");
   hasVariableNumberOfOperands = false;
   
   try {
diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp
index 718491e2b54..3a83746d530 100644
--- a/utils/TableGen/InstrInfoEmitter.cpp
+++ b/utils/TableGen/InstrInfoEmitter.cpp
@@ -197,7 +197,7 @@ void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num,
   if (Inst.isConvertibleToThreeAddress) OS << "|M_CONVERTIBLE_TO_3_ADDR";
   if (Inst.isCommutable) OS << "|M_COMMUTABLE";
   if (Inst.isTerminator) OS << "|M_TERMINATOR_FLAG";
-  if (Inst.usesCustomDAGSChedInserter)
+  if (Inst.usesCustomDAGSchedInserter)
     OS << "|M_USES_CUSTOM_DAG_SCHED_INSERTION";
   OS << ", 0";