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Rename getTargetNode to getMachineNode, for consistency with the
naming scheme used in SelectionDAG, where there are multiple kinds of "target" nodes, but "machine" nodes are nodes which represent a MachineInstr. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82790 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -650,38 +650,38 @@ public:
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SDNode *MorphNodeTo(SDNode *N, unsigned Opc, SDVTList VTs,
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const SDValue *Ops, unsigned NumOps);
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/// getTargetNode - These are used for target selectors to create a new node
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/// with specified return type(s), target opcode, and operands.
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/// getMachineNode - These are used for target selectors to create a new node
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/// with specified return type(s), MachineInstr opcode, and operands.
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///
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/// Note that getTargetNode returns the resultant node. If there is already a
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/// node of the specified opcode and operands, it returns that node instead of
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/// the current one.
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SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT);
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SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1);
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SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1,
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SDValue Op2);
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SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT,
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SDValue Op1, SDValue Op2, SDValue Op3);
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SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT,
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const SDValue *Ops, unsigned NumOps);
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SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2);
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SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2,
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SDValue Op1);
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SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1,
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EVT VT2, SDValue Op1, SDValue Op2);
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SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1,
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EVT VT2, SDValue Op1, SDValue Op2, SDValue Op3);
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SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2,
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const SDValue *Ops, unsigned NumOps);
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SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2, EVT VT3,
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SDValue Op1, SDValue Op2);
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SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2, EVT VT3,
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SDValue Op1, SDValue Op2, SDValue Op3);
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SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2, EVT VT3,
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const SDValue *Ops, unsigned NumOps);
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SDNode *getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2, EVT VT3,
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EVT VT4, const SDValue *Ops, unsigned NumOps);
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SDNode *getTargetNode(unsigned Opcode, DebugLoc dl,
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/// Note that getMachineNode returns the resultant node. If there is already
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/// a node of the specified opcode and operands, it returns that node instead
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/// of the current one.
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SDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT);
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SDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1);
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SDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1,
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SDValue Op2);
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SDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
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SDValue Op1, SDValue Op2, SDValue Op3);
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SDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
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const SDValue *Ops, unsigned NumOps);
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SDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2);
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SDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2,
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SDValue Op1);
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SDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
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EVT VT2, SDValue Op1, SDValue Op2);
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SDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
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EVT VT2, SDValue Op1, SDValue Op2, SDValue Op3);
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SDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2,
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const SDValue *Ops, unsigned NumOps);
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SDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2,
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EVT VT3, SDValue Op1, SDValue Op2);
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SDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2,
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EVT VT3, SDValue Op1, SDValue Op2, SDValue Op3);
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SDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2,
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EVT VT3, const SDValue *Ops, unsigned NumOps);
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SDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2,
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EVT VT3, EVT VT4, const SDValue *Ops, unsigned NumOps);
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SDNode *getMachineNode(unsigned Opcode, DebugLoc dl,
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const std::vector<EVT> &ResultTys, const SDValue *Ops,
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unsigned NumOps);
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