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[mips] Remove remaining use of MipsCC::intArgRegs() in favour of MipsABIInfo::GetByValArgRegs() and MipsABIInfo::GetVarArgRegs()

Browse Source 
Summary: Depends on D6112

Reviewers: theraven, vmedic

Reviewed By: vmedic

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6113

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221521 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Daniel Sanders 2014-11-07 12:21:37 +00:00
parent 73bbfc537e
commit 605a80b218
4 changed files with 18 additions and 15 deletions
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8
lib/Target/Mips/MipsABIInfo.cpp
View File

@ -27,3 +27,11 @@ const ArrayRef<MCPhysReg> MipsABIInfo::GetByValArgRegs() const {
return makeArrayRef(Mips64IntRegs);
llvm_unreachable("Unhandled ABI");
}
const ArrayRef<MCPhysReg> MipsABIInfo::GetVarArgRegs() const {
if (IsO32())
return makeArrayRef(O32IntRegs);
if (IsN32() || IsN64())
return makeArrayRef(Mips64IntRegs);
llvm_unreachable("Unhandled ABI");
}

4
lib/Target/Mips/MipsABIInfo.h
View File

@ -38,8 +38,12 @@ public:
bool IsEABI() const { return ThisABI == ABI::EABI; }
ABI GetEnumValue() const { return ThisABI; }
/// The registers to use for byval arguments.
const ArrayRef<MCPhysReg> GetByValArgRegs() const;
/// The registers to use for the variable argument list.
const ArrayRef<MCPhysReg> GetVarArgRegs() const;
/// Ordering of ABI's
/// MipsGenSubtargetInfo.inc will use this to resolve conflicts when given
/// multiple ABI options.

18
lib/Target/Mips/MipsISelLowering.cpp
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@ -3628,12 +3628,6 @@ unsigned MipsTargetLowering::MipsCC::reservedArgArea() const {
return (Subtarget.isABI_O32() && (CallConv != CallingConv::Fast)) ? 16 : 0;
}
const ArrayRef<MCPhysReg> MipsTargetLowering::MipsCC::intArgRegs() const {
if (Subtarget.isABI_O32())
return makeArrayRef(O32IntRegs);
return makeArrayRef(Mips64IntRegs);
}
void MipsTargetLowering::copyByValRegs(
SDValue Chain, SDLoc DL, std::vector<SDValue> &OutChains, SelectionDAG &DAG,
const ISD::ArgFlagsTy &Flags, SmallVectorImpl<SDValue> &InVals,
@ -3646,11 +3640,11 @@ void MipsTargetLowering::copyByValRegs(
unsigned RegAreaSize = NumRegs * GPRSizeInBytes;
unsigned FrameObjSize = std::max(Flags.getByValSize(), RegAreaSize);
int FrameObjOffset;
ArrayRef<MCPhysReg> ByValArgRegs = Subtarget.getABI().GetByValArgRegs();
if (RegAreaSize)
FrameObjOffset =
(int)CC.reservedArgArea() -
(int)((CC.intArgRegs().size() - FirstReg) * GPRSizeInBytes);
FrameObjOffset = (int)CC.reservedArgArea() -
(int)((ByValArgRegs.size() - FirstReg) * GPRSizeInBytes);
else
FrameObjOffset = VA.getLocMemOffset();
@ -3668,7 +3662,7 @@ void MipsTargetLowering::copyByValRegs(
const TargetRegisterClass *RC = getRegClassFor(RegTy);
for (unsigned I = 0; I < NumRegs; ++I) {
unsigned ArgReg = CC.intArgRegs()[FirstReg + I];
unsigned ArgReg = ByValArgRegs[FirstReg + I];
unsigned VReg = addLiveIn(MF, ArgReg, RC);
unsigned Offset = I * GPRSizeInBytes;
SDValue StorePtr = DAG.getNode(ISD::ADD, DL, PtrTy, FIN,
@ -3696,7 +3690,7 @@ void MipsTargetLowering::passByValArg(
unsigned NumRegs = LastReg - FirstReg;
if (NumRegs) {
const ArrayRef<MCPhysReg> ArgRegs = CC.intArgRegs();
const ArrayRef<MCPhysReg> ArgRegs = Subtarget.getABI().GetByValArgRegs();
bool LeftoverBytes = (NumRegs * RegSizeInBytes > ByValSizeInBytes);
unsigned I = 0;
@ -3779,7 +3773,7 @@ void MipsTargetLowering::writeVarArgRegs(std::vector<SDValue> &OutChains,
const MipsCC &CC, SDValue Chain,
SDLoc DL, SelectionDAG &DAG,
CCState &State) const {
const ArrayRef<MCPhysReg> ArgRegs = CC.intArgRegs();
const ArrayRef<MCPhysReg> ArgRegs = Subtarget.getABI().GetVarArgRegs();
unsigned Idx = State.getFirstUnallocated(ArgRegs.data(), ArgRegs.size());
unsigned RegSizeInBytes = Subtarget.getGPRSizeInBytes();
MVT RegTy = MVT::getIntegerVT(RegSizeInBytes * 8);

3
lib/Target/Mips/MipsISelLowering.h
View File

@ -367,9 +367,6 @@ namespace llvm {
/// register arguments. This is 16-byte if ABI is O32.
unsigned reservedArgArea() const;
/// Return pointer to array of integer argument registers.
const ArrayRef<MCPhysReg> intArgRegs() const;
private:
CallingConv::ID CallConv;
const MipsSubtarget &Subtarget;