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Fix indentation

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203515 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matt Arsenault 2014-03-11 00:01:27 +00:00
parent 99b683ba6c
commit 60616b61dc
1 changed files with 8 additions and 9 deletions
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17
lib/Target/R600/AMDGPUInstrInfo.cpp
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@ -124,17 +124,16 @@ AMDGPUInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
bool AMDGPUInstrInfo::expandPostRAPseudo (MachineBasicBlock::iterator MI) const {
MachineBasicBlock *MBB = MI->getParent();
int OffsetOpIdx =
AMDGPU::getNamedOperandIdx(MI->getOpcode(), AMDGPU::OpName::addr);
int OffsetOpIdx = AMDGPU::getNamedOperandIdx(MI->getOpcode(),
AMDGPU::OpName::addr);
// addr is a custom operand with multiple MI operands, and only the
// first MI operand is given a name.
int RegOpIdx = OffsetOpIdx + 1;
int ChanOpIdx =
AMDGPU::getNamedOperandIdx(MI->getOpcode(), AMDGPU::OpName::chan);
int ChanOpIdx = AMDGPU::getNamedOperandIdx(MI->getOpcode(),
AMDGPU::OpName::chan);
if (isRegisterLoad(*MI)) {
int DstOpIdx =
AMDGPU::getNamedOperandIdx(MI->getOpcode(), AMDGPU::OpName::dst);
int DstOpIdx = AMDGPU::getNamedOperandIdx(MI->getOpcode(),
AMDGPU::OpName::dst);
unsigned RegIndex = MI->getOperand(RegOpIdx).getImm();
unsigned Channel = MI->getOperand(ChanOpIdx).getImm();
unsigned Address = calculateIndirectAddress(RegIndex, Channel);
@ -147,8 +146,8 @@ bool AMDGPUInstrInfo::expandPostRAPseudo (MachineBasicBlock::iterator MI) const
Address, OffsetReg);
}
} else if (isRegisterStore(*MI)) {
int ValOpIdx =
AMDGPU::getNamedOperandIdx(MI->getOpcode(), AMDGPU::OpName::val);
int ValOpIdx = AMDGPU::getNamedOperandIdx(MI->getOpcode(),
AMDGPU::OpName::val);
AMDGPU::getNamedOperandIdx(MI->getOpcode(), AMDGPU::OpName::dst);
unsigned RegIndex = MI->getOperand(RegOpIdx).getImm();
unsigned Channel = MI->getOperand(ChanOpIdx).getImm();