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Thumb assembly parsing and encoding for LDR(immediate) form T1.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138047 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2011-08-19 17:55:24 +00:00
parent e865c035fd
commit 60f91a3d95
3 changed files with 33 additions and 1 deletions
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2
lib/Target/ARM/ARMInstrThumb.td
View File

@ -157,11 +157,13 @@ def t_addrmode_rrs4 : Operand<i32>,
// t_addrmode_is4 := reg + imm5 * 4
//
def t_addrmode_is4_asm_operand : AsmOperandClass { let Name = "MemThumbRIs4"; }
def t_addrmode_is4 : Operand<i32>,
ComplexPattern<i32, 2, "SelectThumbAddrModeImm5S4", []> {
let EncoderMethod = "getAddrModeISOpValue";
let DecoderMethod = "DecodeThumbAddrModeIS";
let PrintMethod = "printThumbAddrModeImm5S4Operand";
let ParserMatchClass = t_addrmode_is4_asm_operand;
let MIOperandInfo = (ops tGPR:$base, i32imm:$offsimm);
}

19
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
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@ -616,7 +616,17 @@ public:
if (Kind != Memory || !Mem.OffsetRegNum || Mem.isNegative ||
Mem.ShiftType != ARM_AM::no_shift)
return false;
return true;
return isARMLowRegister(Mem.BaseRegNum) &&
(!Mem.OffsetRegNum || isARMLowRegister(Mem.OffsetRegNum));
}
bool isMemThumbRIs4() const {
if (Kind != Memory || Mem.OffsetRegNum != 0 ||
!isARMLowRegister(Mem.BaseRegNum))
return false;
// Immediate offset, multiple of 4 in range [0, 124].
if (!Mem.OffsetImm) return true;
int64_t Val = Mem.OffsetImm->getValue();
return Val >= 0 && Val < 125 && (Val % 4) == 0;
}
bool isMemImm8Offset() const {
if (Kind != Memory || Mem.OffsetRegNum != 0)
@ -975,6 +985,13 @@ public:
Inst.addOperand(MCOperand::CreateReg(Mem.OffsetRegNum));
}
void addMemThumbRIs4Operands(MCInst &Inst, unsigned N) const {
assert(N == 2 && "Invalid number of operands!");
int64_t Val = Mem.OffsetImm ? (Mem.OffsetImm->getValue() / 4) : 0;
Inst.addOperand(MCOperand::CreateReg(Mem.BaseRegNum));
Inst.addOperand(MCOperand::CreateImm(Val));
}
void addPostIdxImm8Operands(MCInst &Inst, unsigned N) const {
assert(N == 1 && "Invalid number of operands!");
const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());

13
test/MC/ARM/basic-thumb-instructions.s
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@ -174,3 +174,16 @@ _func:
@ CHECK: ldm r3, {r0, r1, r2, r3, r4, r5, r6, r7} @ encoding: [0xff,0xcb]
@ CHECK: ldm r2!, {r1, r3, r4, r5, r7} @ encoding: [0xba,0xca]
@ CHECK: ldm r1, {r1} @ encoding: [0x02,0xc9]
@------------------------------------------------------------------------------
@ LDR (immediate)
@------------------------------------------------------------------------------
ldr r1, [r5]
ldr r2, [r6, #32]
ldr r3, [r7, #124]
@ CHECK: ldr r1, [r5] @ encoding: [0x29,0x68]
@ CHECK: ldr r2, [r6, #32] @ encoding: [0x32,0x6a]
@ CHECK: ldr r3, [r7, #124] @ encoding: [0xfb,0x6f]