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https://github.com/c64scene-ar/llvm-6502.git
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[mips][microMIPS] Implement JRADDIUSP instruction
Differential Revision: http://reviews.llvm.org/D5046 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217681 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@@ -344,6 +344,25 @@ getJumpTargetOpValueMM(const MCInst &MI, unsigned OpNo,
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return 0;
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return 0;
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}
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}
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unsigned MipsMCCodeEmitter::
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getUImm5Lsl2Encoding(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const {
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const MCOperand &MO = MI.getOperand(OpNo);
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if (MO.isImm()) {
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// The immediate is encoded as 'immediate << 2'.
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unsigned Res = getMachineOpValue(MI, MO, Fixups, STI);
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assert((Res & 3) == 0);
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return Res >> 2;
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}
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assert(MO.isExpr() &&
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"getUImm5Lsl2Encoding expects only expressions or an immediate");
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return 0;
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}
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unsigned MipsMCCodeEmitter::
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unsigned MipsMCCodeEmitter::
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getExprOpValue(const MCExpr *Expr,SmallVectorImpl<MCFixup> &Fixups,
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getExprOpValue(const MCExpr *Expr,SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const {
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const MCSubtargetInfo &STI) const {
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@@ -74,6 +74,12 @@ public:
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SmallVectorImpl<MCFixup> &Fixups,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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const MCSubtargetInfo &STI) const;
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// getUImm5Lsl2Encoding - Return binary encoding of the microMIPS jump
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// target operand.
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unsigned getUImm5Lsl2Encoding(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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// getBranchTargetOpValue - Return binary encoding of the branch
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// getBranchTargetOpValue - Return binary encoding of the branch
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// target operand. If the machine operand requires relocation,
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// target operand. If the machine operand requires relocation,
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// record the relocation and return zero.
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// record the relocation and return zero.
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@@ -72,6 +72,17 @@ class MFHILO_FM_MM16<bits<5> funct> {
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let Inst{4-0} = rd;
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let Inst{4-0} = rd;
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}
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}
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class JRADDIUSP_FM_MM16<bits<5> op> {
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bits<5> rs;
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bits<5> imm;
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bits<16> Inst;
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let Inst{15-10} = 0x11;
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let Inst{9-5} = op;
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let Inst{4-0} = imm;
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}
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// MicroMIPS 32-bit Instruction Formats
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// MicroMIPS 32-bit Instruction Formats
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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@@ -4,6 +4,10 @@ def simm12 : Operand<i32> {
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let DecoderMethod = "DecodeSimm12";
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let DecoderMethod = "DecodeSimm12";
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}
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}
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def uimm5_lsl2 : Operand<OtherVT> {
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let EncoderMethod = "getUImm5Lsl2Encoding";
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}
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def mem_mm_12 : Operand<i32> {
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def mem_mm_12 : Operand<i32> {
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let PrintMethod = "printMemOperand";
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let PrintMethod = "printMemOperand";
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let MIOperandInfo = (ops GPR32, simm12);
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let MIOperandInfo = (ops GPR32, simm12);
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@@ -104,6 +108,17 @@ class JumpLinkRegMM16<string opstr, RegisterOperand RO> :
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let Defs = [RA];
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let Defs = [RA];
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}
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}
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// Base class for JRADDIUSP instruction.
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class JumpRAddiuStackMM16 :
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MicroMipsInst16<(outs), (ins uimm5_lsl2:$imm), "jraddiusp\t$imm",
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[], IIBranch, FrmR> {
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let isTerminator = 1;
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let isBarrier = 1;
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let hasDelaySlot = 1;
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let isBranch = 1;
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let isIndirectBranch = 1;
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}
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// MicroMIPS Jump and Link (Call) - Short Delay Slot
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// MicroMIPS Jump and Link (Call) - Short Delay Slot
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let isCall = 1, hasDelaySlot = 1, Defs = [RA] in {
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let isCall = 1, hasDelaySlot = 1, Defs = [RA] in {
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class JumpLinkMM<string opstr, DAGOperand opnd> :
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class JumpLinkMM<string opstr, DAGOperand opnd> :
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@@ -126,6 +141,7 @@ def MFHI16_MM : MoveFromHILOMM<"mfhi", GPR32Opnd, AC0>, MFHILO_FM_MM16<0x10>;
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def MFLO16_MM : MoveFromHILOMM<"mflo", GPR32Opnd, AC0>, MFHILO_FM_MM16<0x12>;
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def MFLO16_MM : MoveFromHILOMM<"mflo", GPR32Opnd, AC0>, MFHILO_FM_MM16<0x12>;
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def MOVE16_MM : MoveMM16<"move", GPR32Opnd>, MOVE_FM_MM16<0x03>;
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def MOVE16_MM : MoveMM16<"move", GPR32Opnd>, MOVE_FM_MM16<0x03>;
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def JALR16_MM : JumpLinkRegMM16<"jalr", GPR32Opnd>, JALR_FM_MM16<0x0e>;
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def JALR16_MM : JumpLinkRegMM16<"jalr", GPR32Opnd>, JALR_FM_MM16<0x0e>;
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def JRADDIUSP : JumpRAddiuStackMM16, JRADDIUSP_FM_MM16<0x18>;
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class WaitMM<string opstr> :
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class WaitMM<string opstr> :
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InstSE<(outs), (ins uimm10:$code_), !strconcat(opstr, "\t$code_"), [],
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InstSE<(outs), (ins uimm10:$code_), !strconcat(opstr, "\t$code_"), [],
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@@ -13,6 +13,8 @@
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# CHECK-EL: mflo $9 # encoding: [0x49,0x46]
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# CHECK-EL: mflo $9 # encoding: [0x49,0x46]
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# CHECK-EL: move $25, $1 # encoding: [0x21,0x0f]
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# CHECK-EL: move $25, $1 # encoding: [0x21,0x0f]
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# CHECK-EL: jalr $9 # encoding: [0xc9,0x45]
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# CHECK-EL: jalr $9 # encoding: [0xc9,0x45]
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# CHECK-EL: jraddiusp 20 # encoding: [0x05,0x47]
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# CHECK-EL: nop # encoding: [0x00,0x00,0x00,0x00]
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#------------------------------------------------------------------------------
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#------------------------------------------------------------------------------
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# Big endian
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# Big endian
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#------------------------------------------------------------------------------
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#------------------------------------------------------------------------------
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@@ -20,8 +22,11 @@
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# CHECK-EB: mflo $9 # encoding: [0x46,0x49]
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# CHECK-EB: mflo $9 # encoding: [0x46,0x49]
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# CHECK-EB: move $25, $1 # encoding: [0x0f,0x21]
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# CHECK-EB: move $25, $1 # encoding: [0x0f,0x21]
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# CHECK-EB: jalr $9 # encoding: [0x45,0xc9]
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# CHECK-EB: jalr $9 # encoding: [0x45,0xc9]
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# CHECK-EB: jraddiusp 20 # encoding: [0x47,0x05]
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# CHECK-EB: nop # encoding: [0x00,0x00,0x00,0x00]
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mfhi $9
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mfhi $9
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mflo $9
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mflo $9
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move $25, $1
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move $25, $1
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jalr $9
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jalr $9
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jraddiusp 20
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