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Add missing const qualifiers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37342 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -245,8 +245,9 @@ ARMLoadStoreOpt::MergeLDR_STR(MachineBasicBlock &MBB, unsigned SIndex,
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/// getInstrPredicate - If instruction is predicated, returns its predicate
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/// condition, otherwise returns AL.
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static ARMCC::CondCodes getInstrPredicate(MachineInstr *MI) {
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MachineOperand *PredMO = MI->findFirstPredOperand();
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return PredMO ? (ARMCC::CondCodes)PredMO->getImmedValue() : ARMCC::AL;
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int PIdx = MI->findFirstPredOperandIdx();
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return PIdx == -1 ? ARMCC::AL
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: (ARMCC::CondCodes)MI->getOperand(PIdx).getImmedValue();
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}
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static inline bool isMatchingDecrement(MachineInstr *MI, unsigned Base,
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