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Implemented Neon scalar vdup_lane intrinsics.
Fixed scalar dup alias and added test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195330 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -5883,16 +5883,37 @@ defm : NeonI_SDUP<Neon_low2D, Neon_High2D, v1i64, v2i64>;
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defm : NeonI_SDUP<Neon_low4f, Neon_High4f, v2f32, v4f32>;
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defm : NeonI_SDUP<Neon_low2d, Neon_High2d, v1f64, v2f64>;
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// Patterns for vector extract of FP data using scalar DUP instructions
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// Patterns for vector extract of FP data using scalar DUP instructions
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defm : NeonI_Scalar_DUP_Elt_pattern<DUPsv_S, f32,
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v4f32, neon_uimm2_bare, v2f32, v4f32, neon_uimm1_bare>;
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defm : NeonI_Scalar_DUP_Elt_pattern<DUPdv_D, f64,
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v2f64, neon_uimm1_bare, v1f64, v2f64, neon_uimm0_bare>;
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multiclass NeonI_Scalar_DUP_Vec_pattern<Instruction DUPI,
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ValueType ResTy, ValueType OpTy,Operand OpLImm,
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ValueType NOpTy, ValueType ExTy, Operand OpNImm> {
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def : Pat<(ResTy (extract_subvector (OpTy VPR128:$Rn), OpLImm:$Imm)),
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(ResTy (DUPI VPR128:$Rn, OpLImm:$Imm))>;
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def : Pat<(ResTy (extract_subvector (NOpTy VPR64:$Rn), OpNImm:$Imm)),
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(ResTy (DUPI
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(ExTy (SUBREG_TO_REG (i64 0), VPR64:$Rn, sub_64)),
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OpNImm:$Imm))>;
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}
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// Patterns for extract subvectors of v1ix data using scalar DUP instructions
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defm : NeonI_Scalar_DUP_Vec_pattern<DUPbv_B,
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v1i8, v16i8, neon_uimm4_bare, v8i8, v16i8, neon_uimm3_bare>;
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defm : NeonI_Scalar_DUP_Vec_pattern<DUPhv_H,
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v1i16, v8i16, neon_uimm3_bare, v4i16, v8i16, neon_uimm2_bare>;
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defm : NeonI_Scalar_DUP_Vec_pattern<DUPsv_S,
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v1i32, v4i32, neon_uimm2_bare, v2i32, v4i32, neon_uimm1_bare>;
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multiclass NeonI_Scalar_DUP_alias<string asmop, string asmlane,
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Instruction DUPI, Operand OpImm,
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RegisterClass ResRC> {
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def : NeonInstAlias<!strconcat(asmop, "$Rd, $Rn." # asmlane # "[$Imm]"),
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def : NeonInstAlias<!strconcat(asmop, "$Rd, $Rn" # asmlane # "[$Imm]"),
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(DUPI ResRC:$Rd, VPR128:$Rn, OpImm:$Imm), 0b0>;
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}
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80
test/CodeGen/AArch64/neon-scalar-copy.ll
Normal file
80
test/CodeGen/AArch64/neon-scalar-copy.ll
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@ -0,0 +1,80 @@
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; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+neon < %s | FileCheck %s
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define float @test_dup_sv2S(<2 x float> %v) {
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;CHECK: test_dup_sv2S
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;CHECK: dup {{s[0-31]+}}, {{v[0-31]+}}.s[1]
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%tmp1 = extractelement <2 x float> %v, i32 1
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ret float %tmp1
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}
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define float @test_dup_sv4S(<4 x float> %v) {
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;CHECK: test_dup_sv4S
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;CHECK: dup {{s[0-31]+}}, {{v[0-31]+}}.s[0]
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%tmp1 = extractelement <4 x float> %v, i32 0
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ret float %tmp1
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}
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define double @test_dup_dvD(<1 x double> %v) {
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;CHECK: test_dup_dvD
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;CHECK-NOT: dup {{d[0-31]+}}, {{v[0-31]+}}.d[0]
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;CHECK: ret
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%tmp1 = extractelement <1 x double> %v, i32 0
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ret double %tmp1
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}
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define double @test_dup_dv2D(<2 x double> %v) {
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;CHECK: test_dup_dv2D
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;CHECK: dup {{d[0-31]+}}, {{v[0-31]+}}.d[1]
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%tmp1 = extractelement <2 x double> %v, i32 1
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ret double %tmp1
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}
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define <1 x i8> @test_vector_dup_bv16B(<16 x i8> %v1) {
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;CHECK: test_vector_dup_bv16B
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;CHECK: dup {{b[0-31]+}}, {{v[0-31]+}}.b[14]
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%shuffle.i = shufflevector <16 x i8> %v1, <16 x i8> undef, <1 x i32> <i32 14>
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ret <1 x i8> %shuffle.i
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}
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define <1 x i8> @test_vector_dup_bv8B(<8 x i8> %v1) {
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;CHECK: test_vector_dup_bv8B
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;CHECK: dup {{b[0-31]+}}, {{v[0-31]+}}.b[7]
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%shuffle.i = shufflevector <8 x i8> %v1, <8 x i8> undef, <1 x i32> <i32 7>
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ret <1 x i8> %shuffle.i
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}
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define <1 x i16> @test_vector_dup_hv8H(<8 x i16> %v1) {
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;CHECK: test_vector_dup_hv8H
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;CHECK: dup {{h[0-31]+}}, {{v[0-31]+}}.h[7]
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%shuffle.i = shufflevector <8 x i16> %v1, <8 x i16> undef, <1 x i32> <i32 7>
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ret <1 x i16> %shuffle.i
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}
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define <1 x i16> @test_vector_dup_hv4H(<4 x i16> %v1) {
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;CHECK: test_vector_dup_hv4H
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;CHECK: dup {{h[0-31]+}}, {{v[0-31]+}}.h[3]
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%shuffle.i = shufflevector <4 x i16> %v1, <4 x i16> undef, <1 x i32> <i32 3>
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ret <1 x i16> %shuffle.i
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}
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define <1 x i32> @test_vector_dup_sv4S(<4 x i32> %v1) {
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;CHECK: test_vector_dup_sv4S
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;CHECK: dup {{s[0-31]+}}, {{v[0-31]+}}.s[3]
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%shuffle = shufflevector <4 x i32> %v1, <4 x i32> undef, <1 x i32> <i32 3>
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ret <1 x i32> %shuffle
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}
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define <1 x i32> @test_vector_dup_sv2S(<2 x i32> %v1) {
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;CHECK: test_vector_dup_sv2S
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;CHECK: dup {{s[0-31]+}}, {{v[0-31]+}}.s[1]
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%shuffle = shufflevector <2 x i32> %v1, <2 x i32> undef, <1 x i32> <i32 1>
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ret <1 x i32> %shuffle
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}
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define <1 x i64> @test_vector_dup_dv2D(<2 x i64> %v1) {
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;CHECK: test_vector_dup_dv2D
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;CHECK: dup {{d[0-31]+}}, {{v[0-31]+}}.d[1]
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%shuffle.i = shufflevector <2 x i64> %v1, <2 x i64> undef, <1 x i32> <i32 1>
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ret <1 x i64> %shuffle.i
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}
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@ -27,3 +27,29 @@
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// CHECK: dup d3, v5.d[0] // encoding: [0xa3,0x04,0x08,0x5e]
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// CHECK: dup d6, v5.d[1] // encoding: [0xa6,0x04,0x18,0x5e]
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//------------------------------------------------------------------------------
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// Aliases for Duplicate element (scalar)
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//------------------------------------------------------------------------------
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mov b0, v0.b[15]
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mov b1, v0.b[7]
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mov b17, v0.b[0]
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mov h5, v31.h[7]
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mov h9, v1.h[4]
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mov h11, v17.h[0]
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mov s2, v2.s[3]
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mov s4, v21.s[0]
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mov s31, v21.s[2]
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mov d3, v5.d[0]
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mov d6, v5.d[1]
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// CHECK: dup b0, v0.b[15] // encoding: [0x00,0x04,0x1f,0x5e]
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// CHECK: dup b1, v0.b[7] // encoding: [0x01,0x04,0x0f,0x5e]
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// CHECK: dup b17, v0.b[0] // encoding: [0x11,0x04,0x01,0x5e]
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// CHECK: dup h5, v31.h[7] // encoding: [0xe5,0x07,0x1e,0x5e]
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// CHECK: dup h9, v1.h[4] // encoding: [0x29,0x04,0x12,0x5e]
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// CHECK: dup h11, v17.h[0] // encoding: [0x2b,0x06,0x02,0x5e]
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// CHECK: dup s2, v2.s[3] // encoding: [0x42,0x04,0x1c,0x5e]
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// CHECK: dup s4, v21.s[0] // encoding: [0xa4,0x06,0x04,0x5e]
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// CHECK: dup s31, v21.s[2] // encoding: [0xbf,0x06,0x14,0x5e]
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// CHECK: dup d3, v5.d[0] // encoding: [0xa3,0x04,0x08,0x5e]
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// CHECK: dup d6, v5.d[1] // encoding: [0xa6,0x04,0x18,0x5e]
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