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Convert assert(0) to llvm_unreachable.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157380 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2012-05-24 07:02:50 +00:00
parent 7a437a0a6f
commit 6366361998
5 changed files with 20 additions and 31 deletions
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25
lib/Target/NVPTX/NVPTXAsmPrinter.cpp
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@ -478,7 +478,7 @@ NVPTXAsmPrinter::getVirtualRegisterName(unsigned vr, bool isVec,
<< getNVPTXRegClassStr(RC) << mapped_vr << "_1" << getNVPTXRegClassStr(RC) << mapped_vr << "_1"
<< "}"; << "}";
else else
assert(0 && "Unsupported vector size"); llvm_unreachable("Unsupported vector size");
} }
void void
@ -519,7 +519,7 @@ void NVPTXAsmPrinter::printVecModifiedImmediate(const MachineOperand &MO,
O << "_" << vecelem[Imm%2]; O << "_" << vecelem[Imm%2];
} }
else else
assert(0 && "Unknown Modifier on immediate operand"); llvm_unreachable("Unknown Modifier on immediate operand");
} }
void NVPTXAsmPrinter::printOperand(const MachineInstr *MI, int opNum, void NVPTXAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
@ -539,7 +539,7 @@ void NVPTXAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
if (strcmp(Modifier, "vecfull") == 0) if (strcmp(Modifier, "vecfull") == 0)
emitVirtualRegister(MO.getReg(), true, O); emitVirtualRegister(MO.getReg(), true, O);
else else
assert(0 && llvm_unreachable(
"Don't know how to handle the modifier on virtual register."); "Don't know how to handle the modifier on virtual register.");
} }
} }
@ -551,7 +551,7 @@ void NVPTXAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
else if (strstr(Modifier, "vec") == Modifier) else if (strstr(Modifier, "vec") == Modifier)
printVecModifiedImmediate(MO, Modifier, O); printVecModifiedImmediate(MO, Modifier, O);
else else
assert(0 && "Don't know how to handle modifier on immediate operand"); llvm_unreachable("Don't know how to handle modifier on immediate operand");
return; return;
case MachineOperand::MO_FPImmediate: case MachineOperand::MO_FPImmediate:
@ -584,7 +584,7 @@ void NVPTXAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
return; return;
default: default:
assert(0 && " Operand type not supported."); llvm_unreachable("Operand type not supported.");
} }
} }
@ -1257,7 +1257,7 @@ void NVPTXAsmPrinter::emitPTXAddressSpace(unsigned int AddressSpace,
O << "shared" ; O << "shared" ;
break; break;
default: default:
assert(0 && "unexpected address space"); llvm_unreachable("unexpected address space");
} }
} }
@ -1748,8 +1748,7 @@ void NVPTXAsmPrinter::bufferLEByte(Constant *CPV, int Bytes,
ptr = (unsigned char*)&int32; ptr = (unsigned char*)&int32;
aggBuffer->addBytes(ptr, 4, Bytes); aggBuffer->addBytes(ptr, 4, Bytes);
break; break;
} } else if (ConstantExpr *Cexpr = dyn_cast<ConstantExpr>(CPV)) {
else if (ConstantExpr *Cexpr = dyn_cast<ConstantExpr>(CPV)) {
if (ConstantInt *constInt = if (ConstantInt *constInt =
dyn_cast<ConstantInt>(ConstantFoldConstantExpression( dyn_cast<ConstantInt>(ConstantFoldConstantExpression(
Cexpr, TD))) { Cexpr, TD))) {
@ -1765,15 +1764,14 @@ void NVPTXAsmPrinter::bufferLEByte(Constant *CPV, int Bytes,
break; break;
} }
} }
assert(0 && "unsupported integer const type"); llvm_unreachable("unsupported integer const type");
} else if (ETy == Type::getInt64Ty(CPV->getContext()) ) { } else if (ETy == Type::getInt64Ty(CPV->getContext()) ) {
if (ConstantInt *constInt = dyn_cast<ConstantInt>(CPV)) { if (ConstantInt *constInt = dyn_cast<ConstantInt>(CPV)) {
long long int64 =(long long)(constInt->getZExtValue()); long long int64 =(long long)(constInt->getZExtValue());
ptr = (unsigned char*)&int64; ptr = (unsigned char*)&int64;
aggBuffer->addBytes(ptr, 8, Bytes); aggBuffer->addBytes(ptr, 8, Bytes);
break; break;
} } else if (ConstantExpr *Cexpr = dyn_cast<ConstantExpr>(CPV)) {
else if (ConstantExpr *Cexpr = dyn_cast<ConstantExpr>(CPV)) {
if (ConstantInt *constInt = dyn_cast<ConstantInt>( if (ConstantInt *constInt = dyn_cast<ConstantInt>(
ConstantFoldConstantExpression(Cexpr, TD))) { ConstantFoldConstantExpression(Cexpr, TD))) {
long long int64 =(long long)(constInt->getZExtValue()); long long int64 =(long long)(constInt->getZExtValue());
@ -1789,8 +1787,7 @@ void NVPTXAsmPrinter::bufferLEByte(Constant *CPV, int Bytes,
} }
} }
llvm_unreachable("unsupported integer const type"); llvm_unreachable("unsupported integer const type");
} } else
else
llvm_unreachable("unsupported integer const type"); llvm_unreachable("unsupported integer const type");
break; break;
} }
@ -1887,7 +1884,7 @@ void NVPTXAsmPrinter::bufferAggregateConstant(Constant *CPV,
} }
return; return;
} }
assert(0 && "unsupported constant type in printAggregateConstant()"); llvm_unreachable("unsupported constant type in printAggregateConstant()");
} }
// buildTypeNameMap - Run through symbol table looking for type names. // buildTypeNameMap - Run through symbol table looking for type names.

11
lib/Target/NVPTX/NVPTXAsmPrinter.h
View File

@ -148,8 +148,7 @@ class LLVM_LIBRARY_VISIBILITY NVPTXAsmPrinter : public AsmPrinter {
O << ", "; O << ", ";
O << (unsigned int)buffer[i]; O << (unsigned int)buffer[i];
} }
} } else {
else {
// print out in 4-bytes or 8-bytes // print out in 4-bytes or 8-bytes
unsigned int pos = 0; unsigned int pos = 0;
unsigned int nSym = 0; unsigned int nSym = 0;
@ -169,16 +168,14 @@ class LLVM_LIBRARY_VISIBILITY NVPTXAsmPrinter : public AsmPrinter {
else if (ConstantExpr *Cexpr = else if (ConstantExpr *Cexpr =
dyn_cast<ConstantExpr>(v)) { dyn_cast<ConstantExpr>(v)) {
O << *nvptx::LowerConstant(Cexpr, AP); O << *nvptx::LowerConstant(Cexpr, AP);
} } else
else llvm_unreachable("symbol type unknown");
assert(0 && "symbol type unknown");
nSym++; nSym++;
if (nSym >= numSymbols) if (nSym >= numSymbols)
nextSymbolPos = size+1; nextSymbolPos = size+1;
else else
nextSymbolPos = symbolPosInBuffer[nSym]; nextSymbolPos = symbolPosInBuffer[nSym];
} } else
else
if (nBytes == 4) if (nBytes == 4)
O << *(unsigned int*)(buffer+pos); O << *(unsigned int*)(buffer+pos);
else else

2
lib/Target/NVPTX/NVPTXInstrInfo.cpp
View File

@ -106,7 +106,7 @@ void NVPTXInstrInfo::copyPhysReg (MachineBasicBlock &MBB,
BuildMI(MBB, I, DL, get(NVPTX::V2f64Mov), DestReg) BuildMI(MBB, I, DL, get(NVPTX::V2f64Mov), DestReg)
.addReg(SrcReg, getKillRegState(KillSrc)); .addReg(SrcReg, getKillRegState(KillSrc));
else { else {
assert(0 && "Don't know how to copy a register"); llvm_unreachable("Don't know how to copy a register");
} }
} }

9
lib/Target/NVPTX/NVPTXRegisterInfo.cpp
View File

@ -196,8 +196,7 @@ std::string getNVPTXElemClassName(TargetRegisterClass const *RC) {
return getNVPTXRegClassName(&NVPTX::Int32RegsRegClass); return getNVPTXRegClassName(&NVPTX::Int32RegsRegClass);
if (RC->getID() == NVPTX::V4I8RegsRegClassID) if (RC->getID() == NVPTX::V4I8RegsRegClassID)
return getNVPTXRegClassName(&NVPTX::Int8RegsRegClass); return getNVPTXRegClassName(&NVPTX::Int8RegsRegClass);
assert(0 && "Not a vector register class"); llvm_unreachable("Not a vector register class");
return "Unsupported";
} }
const TargetRegisterClass *getNVPTXElemClass(TargetRegisterClass const *RC) { const TargetRegisterClass *getNVPTXElemClass(TargetRegisterClass const *RC) {
@ -221,8 +220,7 @@ const TargetRegisterClass *getNVPTXElemClass(TargetRegisterClass const *RC) {
return (&NVPTX::Int32RegsRegClass); return (&NVPTX::Int32RegsRegClass);
if (RC->getID() == NVPTX::V4I8RegsRegClassID) if (RC->getID() == NVPTX::V4I8RegsRegClassID)
return (&NVPTX::Int8RegsRegClass); return (&NVPTX::Int8RegsRegClass);
assert(0 && "Not a vector register class"); llvm_unreachable("Not a vector register class");
return 0;
} }
int getNVPTXVectorSize(TargetRegisterClass const *RC) { int getNVPTXVectorSize(TargetRegisterClass const *RC) {
@ -246,8 +244,7 @@ int getNVPTXVectorSize(TargetRegisterClass const *RC) {
return 4; return 4;
if (RC->getID() == NVPTX::V4I8RegsRegClassID) if (RC->getID() == NVPTX::V4I8RegsRegClassID)
return 4; return 4;
assert(0 && "Not a vector register class"); llvm_unreachable("Not a vector register class");
return -1;
} }
} }

4
lib/Target/NVPTX/VectorElementize.cpp
View File

@ -731,9 +731,7 @@ unsigned VectorElementize::getScalarVersion(unsigned opcode) {
if (opcode == NVPTX::IMPLICIT_DEF) if (opcode == NVPTX::IMPLICIT_DEF)
return opcode; return opcode;
switch(opcode) { switch(opcode) {
default: default: llvm_unreachable("Scalar version not set, fix NVPTXVector.td");
assert(0 && "Scalar version not set, fix NVPTXVector.td");
return 0;
case TargetOpcode::COPY: return TargetOpcode::COPY; case TargetOpcode::COPY: return TargetOpcode::COPY;
case NVPTX::AddCCCV2I32: return NVPTX::ADDCCCi32rr; case NVPTX::AddCCCV2I32: return NVPTX::ADDCCCi32rr;
case NVPTX::AddCCCV4I32: return NVPTX::ADDCCCi32rr; case NVPTX::AddCCCV4I32: return NVPTX::ADDCCCi32rr;