This patch adds support for microMIPS Multiply and Add/Sub instructions. Test cases are included in patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190154 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Vladimir Medic 2013-09-06 13:08:00 +00:00
parent 3aaa3e31aa
commit 638382e6f1
5 changed files with 61 additions and 5 deletions

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@ -129,4 +129,10 @@ let DecoderNamespace = "MicroMips", Predicates = [InMicroMips] in {
MFLO_FM_MM<0x035>;
def MFLO_MM : MMRel, MoveFromLOHI<"mflo", GPR32Opnd, [LO0]>,
MFLO_FM_MM<0x075>;
/// Multiply Add/Sub Instructions
def MADD_MM : MMRel, MArithR<"madd", 1>, MULT_FM_MM<0x32c>;
def MADDU_MM : MMRel, MArithR<"maddu", 1>, MULT_FM_MM<0x36c>;
def MSUB_MM : MMRel, MArithR<"msub">, MULT_FM_MM<0x3ac>;
def MSUBU_MM : MMRel, MArithR<"msubu">, MULT_FM_MM<0x3ec>;
}

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@ -413,7 +413,7 @@ class ArithLogicI<string opstr, Operand Od, RegisterOperand RO,
// Arithmetic Multiply ADD/SUB
class MArithR<string opstr, bit isComm = 0> :
InstSE<(outs), (ins GPR32Opnd:$rs, GPR32Opnd:$rt),
!strconcat(opstr, "\t$rs, $rt"), [], IIImult, FrmR> {
!strconcat(opstr, "\t$rs, $rt"), [], IIImult, FrmR, opstr> {
let Defs = [HI0, LO0];
let Uses = [HI0, LO0];
let isCommutable = isComm;
@ -1044,10 +1044,10 @@ def NOP : PseudoSE<(outs), (ins), []>, PseudoInstExpansion<(SLL ZERO, ZERO, 0)>;
def LEA_ADDiu : EffectiveAddress<"addiu", GPR32Opnd>, LW_FM<9>;
// MADD*/MSUB*
def MADD : MArithR<"madd", 1>, MULT_FM<0x1c, 0>;
def MADDU : MArithR<"maddu", 1>, MULT_FM<0x1c, 1>;
def MSUB : MArithR<"msub">, MULT_FM<0x1c, 4>;
def MSUBU : MArithR<"msubu">, MULT_FM<0x1c, 5>;
def MADD : MMRel, MArithR<"madd", 1>, MULT_FM<0x1c, 0>;
def MADDU : MMRel, MArithR<"maddu", 1>, MULT_FM<0x1c, 1>;
def MSUB : MMRel, MArithR<"msub">, MULT_FM<0x1c, 4>;
def MSUBU : MMRel, MArithR<"msubu">, MULT_FM<0x1c, 5>;
def PseudoMADD : MAddSubPseudo<MADD, MipsMAdd>;
def PseudoMADDU : MAddSubPseudo<MADDU, MipsMAddu>;
def PseudoMSUB : MAddSubPseudo<MSUB, MipsMSub>;

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@ -171,3 +171,15 @@
# CHECK: mflo $6
0x00 0x06 0x1d 0x7c
# CHECK: madd $4, $5
0x00 0xa4 0xcb 0x3c
# CHECK: maddu $4, $5
0x00 0xa4 0xdb 0x3c
# CHECK: msub $4, $5
0x00 0xa4 0xeb 0x3c
# CHECK: msubu $4, $5
0x00 0xa4 0xfb 0x3c

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@ -171,3 +171,15 @@
# CHECK: mflo $6
0x06 0x00 0x7c 0x1d
# CHECK: madd $4, $5
0xa4 0x00 0x3c 0xcb
# CHECK: maddu $4, $5
0xa4 0x00 0x3c 0xdb
# CHECK: msub $4, $5
0xa4 0x00 0x3c 0xeb
# CHECK: msubu $4, $5
0xa4 0x00 0x3c 0xfb

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@ -0,0 +1,26 @@
# RUN: llvm-mc %s -triple=mipsel -show-encoding -mattr=micromips \
# RUN: | FileCheck -check-prefix=CHECK-EL %s
# RUN: llvm-mc %s -triple=mips -show-encoding -mattr=micromips \
# RUN: | FileCheck -check-prefix=CHECK-EB %s
# Check that the assembler can handle the documented syntax
# for Multiply Add/Sub instructions.
#------------------------------------------------------------------------------
# Multiply Add/Sub Instructions
#------------------------------------------------------------------------------
# Little endian
#------------------------------------------------------------------------------
# CHECK-EL: madd $4, $5 # encoding: [0xa4,0x00,0x3c,0xcb]
# CHECK-EL: maddu $4, $5 # encoding: [0xa4,0x00,0x3c,0xdb]
# CHECK-EL: msub $4, $5 # encoding: [0xa4,0x00,0x3c,0xeb]
# CHECK-EL: msubu $4, $5 # encoding: [0xa4,0x00,0x3c,0xfb]
#------------------------------------------------------------------------------
# Big endian
#------------------------------------------------------------------------------
# CHECK-EB: madd $4, $5 # encoding: [0x00,0xa4,0xcb,0x3c]
# CHECK-EB: maddu $4, $5 # encoding: [0x00,0xa4,0xdb,0x3c]
# CHECK-EB: msub $4, $5 # encoding: [0x00,0xa4,0xeb,0x3c]
# CHECK-EB: msubu $4, $5 # encoding: [0x00,0xa4,0xfb,0x3c]
madd $4, $5
maddu $4, $5
msub $4, $5
msubu $4, $5