6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-11-01 00:17:01 +00:00
Code Issues Projects Releases Wiki Activity

There shalt be only one "immediate" operand type!

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28099 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2006-05-04 17:21:20 +00:00
parent ceb408f6a2
commit 63b3d7113d
18 changed files with 51 additions and 86 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
lib/Target/Sparc/SparcRegisterInfo.cpp
View File

@@ -111,7 +111,7 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
if (MI.getOpcode() == SP::ADJCALLSTACKDOWN)
Size = -Size;
if (Size)
BuildMI(MBB, I, SP::ADDri, 2, SP::O6).addReg(SP::O6).addSImm(Size);
BuildMI(MBB, I, SP::ADDri, 2, SP::O6).addReg(SP::O6).addImm(Size);
MBB.erase(I);
}
@@ -136,7 +136,7 @@ SparcRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const {
// If the offset is small enough to fit in the immediate field, directly
// encode it.
MI.SetMachineOperandReg(i, SP::I6);
MI.SetMachineOperandConst(i+1, MachineOperand::MO_SignExtendedImmed,Offset);
MI.SetMachineOperandConst(i+1, MachineOperand::MO_Immediate, Offset);
} else {
// Otherwise, emit a G1 = SETHI %hi(offset). FIXME: it would be better to
// scavenge a register here instead of reserving G1 all of the time.
@@ -147,7 +147,7 @@ SparcRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const {
SP::G1).addReg(SP::G1).addReg(SP::I6);
// Insert: G1+%lo(offset) into the user.
MI.SetMachineOperandReg(i, SP::G1);
MI.SetMachineOperandConst(i+1, MachineOperand::MO_SignExtendedImmed,
MI.SetMachineOperandConst(i+1, MachineOperand::MO_Immediate,
Offset & ((1 << 10)-1));
}
}