6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-27 13:30:05 +00:00
Code Issues Projects Releases Wiki Activity

[msan] Origin stores and loads do not need explicit alignment.

Browse Source 
Origin address is always 4 byte aligned, and the access type is always i32.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170199 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evgeniy Stepanov 2012-12-14 13:43:11 +00:00
parent e6b63c1188
commit 63cca4e2fd
2 changed files with 38 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
lib/Transforms/Instrumentation/MemorySanitizer.cpp
View File

@ -421,7 +421,7 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
if (ClTrackOrigins) {
if (ClStoreCleanOrigin || isa<StructType>(Shadow->getType())) {
IRB.CreateAlignedStore(getOrigin(Val), getOriginPtr(Addr, IRB), I.getAlignment());
IRB.CreateStore(getOrigin(Val), getOriginPtr(Addr, IRB));
} else {
Value *ConvertedShadow = convertToShadowTyNoVec(Shadow, IRB);
@ -435,10 +435,10 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
Value *Cmp = IRB.CreateICmpNE(ConvertedShadow,
getCleanShadow(ConvertedShadow), "_mscmp");
Instruction *CheckTerm =
SplitBlockAndInsertIfThen(cast<Instruction>(Cmp), false, MS.OriginStoreWeights);
IRBuilder<> IRBNewBlock(CheckTerm);
IRBNewBlock.CreateAlignedStore(getOrigin(Val),
getOriginPtr(Addr, IRBNewBlock), I.getAlignment());
SplitBlockAndInsertIfThen(cast<Instruction>(Cmp), false,
MS.OriginStoreWeights);
IRBuilder<> IRBNew(CheckTerm);
IRBNew.CreateStore(getOrigin(Val), getOriginPtr(Addr, IRBNew));
}
}
}
@ -787,7 +787,7 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
insertCheck(I.getPointerOperand(), &I);
if (ClTrackOrigins)
setOrigin(&I, IRB.CreateAlignedLoad(getOriginPtr(Addr, IRB), I.getAlignment()));
setOrigin(&I, IRB.CreateLoad(getOriginPtr(Addr, IRB)));
}
/// \brief Instrument StoreInst
@ -1296,9 +1296,8 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
kShadowTLSAlignment);
}
if (ClTrackOrigins)
IRB.CreateAlignedStore(getOrigin(A),
getOriginPtrForArgument(A, IRB, ArgOffset),
kShadowTLSAlignment);
IRB.CreateStore(getOrigin(A),
getOriginPtrForArgument(A, IRB, ArgOffset));
assert(Size != 0 && Store != 0);
DEBUG(dbgs() << " Param:" << *Store << "\n");
ArgOffset += DataLayout::RoundUpAlignment(Size, 8);

30
test/Instrumentation/MemorySanitizer/msan_basic.ll
View File

@ -8,7 +8,9 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
; Check the presence and the linkage type of __msan_track_origins
; CHECK: @__msan_track_origins = weak_odr constant i32 0
; Check instrumentation of stores
define void @Store(i32* nocapture %p, i32 %x) nounwind uwtable {
entry:
store i32 %x, i32* %p, align 4
@ -33,6 +35,34 @@ entry:
; CHECK-ORIGINS: ret void
; Check instrumentation of aligned stores
; Shadow store has the same alignment as the original store; origin store
; does not specify explicit alignment.
define void @AlignedStore(i32* nocapture %p, i32 %x) nounwind uwtable {
entry:
store i32 %x, i32* %p, align 32
ret void
}
; CHECK: @AlignedStore
; CHECK: load {{.*}} @__msan_param_tls
; CHECK: store {{.*}} align 32
; CHECK: store {{.*}} align 32
; CHECK: ret void
; CHECK-ORIGINS: @AlignedStore
; CHECK-ORIGINS: load {{.*}} @__msan_param_tls
; CHECK-ORIGINS: store {{.*}} align 32
; CHECK-ORIGINS: icmp
; CHECK-ORIGINS: br i1
; CHECK-ORIGINS: <label>
; CHECK-ORIGINS-NOT: store {{.*}} align
; CHECK-ORIGINS: br label
; CHECK-ORIGINS: <label>
; CHECK-ORIGINS: store {{.*}} align 32
; CHECK-ORIGINS: ret void
; load followed by cmp: check that we load the shadow and call __msan_warning.
define void @LoadAndCmp(i32* nocapture %a) nounwind uwtable {
entry: