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changes to get ptr_rc to be accepted in patterns. This is needed for ppc preinc

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stores.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31738 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2006-11-14 21:18:40 +00:00
parent 3cdd9f65ed
commit 646085dde9
1 changed files with 22 additions and 8 deletions
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30
utils/TableGen/DAGISelEmitter.cpp
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@ -618,6 +618,9 @@ static std::vector<unsigned char> getImplicitType(Record *R, bool NotRegisters,
std::vector<unsigned char> std::vector<unsigned char>
ComplexPat(1, TP.getDAGISelEmitter().getComplexPattern(R).getValueType()); ComplexPat(1, TP.getDAGISelEmitter().getComplexPattern(R).getValueType());
return ComplexPat; return ComplexPat;
} else if (R->getName() == "ptr_rc") {
Other[0] = MVT::iPTR;
return Other;
} else if (R->getName() == "node" || R->getName() == "srcvalue") { } else if (R->getName() == "node" || R->getName() == "srcvalue") {
// Placeholder. // Placeholder.
return Unknown; return Unknown;
@ -747,16 +750,23 @@ bool TreePatternNode::ApplyTypeConstraints(TreePattern &TP, bool NotRegisters) {
CodeGenInstruction &InstInfo = CodeGenInstruction &InstInfo =
ISE.getTargetInfo().getInstruction(getOperator()->getName()); ISE.getTargetInfo().getInstruction(getOperator()->getName());
// Apply the result type to the node // Apply the result type to the node
if (NumResults == 0 || InstInfo.noResults) { // FIXME: temporary hack... if (NumResults == 0 || InstInfo.noResults) { // FIXME: temporary hack.
MadeChange = UpdateNodeType(MVT::isVoid, TP); MadeChange = UpdateNodeType(MVT::isVoid, TP);
} else { } else {
Record *ResultNode = Inst.getResult(0); Record *ResultNode = Inst.getResult(0);
assert(ResultNode->isSubClassOf("RegisterClass") &&
"Operands should be register classes!"); if (ResultNode->getName() == "ptr_rc") {
std::vector<unsigned char> VT;
VT.push_back(MVT::iPTR);
MadeChange = UpdateNodeType(VT, TP);
} else {
assert(ResultNode->isSubClassOf("RegisterClass") &&
"Operands should be register classes!");
const CodeGenRegisterClass &RC = const CodeGenRegisterClass &RC =
ISE.getTargetInfo().getRegisterClass(ResultNode); ISE.getTargetInfo().getRegisterClass(ResultNode);
MadeChange = UpdateNodeType(ConvertVTs(RC.getValueTypes()), TP); MadeChange = UpdateNodeType(ConvertVTs(RC.getValueTypes()), TP);
}
} }
unsigned ChildNo = 0; unsigned ChildNo = 0;
@ -782,6 +792,8 @@ bool TreePatternNode::ApplyTypeConstraints(TreePattern &TP, bool NotRegisters) {
} else if (OperandNode->isSubClassOf("Operand")) { } else if (OperandNode->isSubClassOf("Operand")) {
VT = getValueType(OperandNode->getValueAsDef("Type")); VT = getValueType(OperandNode->getValueAsDef("Type"));
MadeChange |= Child->UpdateNodeType(VT, TP); MadeChange |= Child->UpdateNodeType(VT, TP);
} else if (OperandNode->getName() == "ptr_rc") {
MadeChange |= Child->UpdateNodeType(MVT::iPTR, TP);
} else { } else {
assert(0 && "Unknown operand type!"); assert(0 && "Unknown operand type!");
abort(); abort();
@ -1381,7 +1393,8 @@ FindPatternInputsAndOutputs(TreePattern *I, TreePatternNode *Pat,
if (!Val) if (!Val)
I->error("set destination should be a register!"); I->error("set destination should be a register!");
if (Val->getDef()->isSubClassOf("RegisterClass")) { if (Val->getDef()->isSubClassOf("RegisterClass") ||
Val->getDef()->getName() == "ptr_rc") {
if (Dest->getName().empty()) if (Dest->getName().empty())
I->error("set destination must have a name!"); I->error("set destination must have a name!");
if (InstResults.count(Dest->getName())) if (InstResults.count(Dest->getName()))
@ -2507,7 +2520,8 @@ public:
// Handle leaves of various types. // Handle leaves of various types.
if (DefInit *DI = dynamic_cast<DefInit*>(Child->getLeafValue())) { if (DefInit *DI = dynamic_cast<DefInit*>(Child->getLeafValue())) {
Record *LeafRec = DI->getDef(); Record *LeafRec = DI->getDef();
if (LeafRec->isSubClassOf("RegisterClass")) { if (LeafRec->isSubClassOf("RegisterClass") ||
LeafRec->getName() == "ptr_rc") {
// Handle register references. Nothing to do here. // Handle register references. Nothing to do here.
} else if (LeafRec->isSubClassOf("Register")) { } else if (LeafRec->isSubClassOf("Register")) {
// Handle register references. // Handle register references.