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	Some small clean-up: use of pseudo instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110954 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
		@@ -2174,33 +2174,33 @@ def : Pat<(X86SFence), (SFENCE)>;
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// Alias instructions that map zero vector to pxor / xorp* for sse.
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					// Alias instructions that map zero vector to pxor / xorp* for sse.
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// We set canFoldAsLoad because this can be converted to a constant-pool
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					// We set canFoldAsLoad because this can be converted to a constant-pool
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// load of an all-zeros value if folding it would be beneficial.
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					// load of an all-zeros value if folding it would be beneficial.
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// FIXME: Change encoding to pseudo!
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let isReMaterializable = 1, isAsCheapAsAMove = 1, canFoldAsLoad = 1,
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					let isReMaterializable = 1, isAsCheapAsAMove = 1, canFoldAsLoad = 1,
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    isCodeGenOnly = 1 in {
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					    isCodeGenOnly = 1 in {
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def V_SET0PS : PSI<0x57, MRMInitReg, (outs VR128:$dst), (ins), "",
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					  let Predicates = [HasSSE1] in
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					    def V_SET0PS : I<0, Pseudo, (outs VR128:$dst), (ins), "",
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                     [(set VR128:$dst, (v4f32 immAllZerosV))]>;
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					                     [(set VR128:$dst, (v4f32 immAllZerosV))]>;
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def V_SET0PD : PDI<0x57, MRMInitReg, (outs VR128:$dst), (ins), "",
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					  let Predicates = [HasSSE2] in {
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					    def V_SET0PD : I<0, Pseudo, (outs VR128:$dst), (ins), "",
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                     [(set VR128:$dst, (v2f64 immAllZerosV))]>;
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					                     [(set VR128:$dst, (v2f64 immAllZerosV))]>;
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let ExeDomain = SSEPackedInt in
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					    def V_SET0PI : I<0, Pseudo, (outs VR128:$dst), (ins), "",
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def V_SET0PI : PDI<0xEF, MRMInitReg, (outs VR128:$dst), (ins), "",
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					                     [(set VR128:$dst, (v4i32 immAllZerosV))], SSEPackedInt>;
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                 [(set VR128:$dst, (v4i32 immAllZerosV))]>;
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					  }
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}
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					}
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// The same as done above but for AVX. The 128-bit versions are the
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					// The same as done above but for AVX. The 128-bit versions are the
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// same, but re-encoded. The 256-bit does not support PI version.
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					// same, but re-encoded. The 256-bit does not support PI version.
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let isReMaterializable = 1, isAsCheapAsAMove = 1, canFoldAsLoad = 1,
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					let isReMaterializable = 1, isAsCheapAsAMove = 1, canFoldAsLoad = 1,
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    isCodeGenOnly = 1, Predicates = [HasAVX] in {
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					    isCodeGenOnly = 1, Predicates = [HasAVX] in {
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def AVX_SET0PS  : PSI<0x57, MRMInitReg, (outs VR128:$dst), (ins), "",
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					def AVX_SET0PS  : I<0, Pseudo, (outs VR128:$dst), (ins), "",
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                   [(set VR128:$dst, (v4f32 immAllZerosV))]>, VEX_4V;
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					                   [(set VR128:$dst, (v4f32 immAllZerosV))]>;
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def AVX_SET0PD  : PDI<0x57, MRMInitReg, (outs VR128:$dst), (ins), "",
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					def AVX_SET0PD  : I<0, Pseudo, (outs VR128:$dst), (ins), "",
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                   [(set VR128:$dst, (v2f64 immAllZerosV))]>, VEX_4V;
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					                   [(set VR128:$dst, (v2f64 immAllZerosV))]>;
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def AVX_SET0PSY : PSI<0x57, MRMInitReg, (outs VR256:$dst), (ins), "",
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					def AVX_SET0PI  : I<0, Pseudo, (outs VR128:$dst), (ins), "",
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                   [(set VR256:$dst, (v8f32 immAllZerosV))]>, VEX_4V;
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					                   [(set VR128:$dst, (v4i32 immAllZerosV))], SSEPackedInt>;
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def AVX_SET0PDY : PDI<0x57, MRMInitReg, (outs VR256:$dst), (ins), "",
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					def AVX_SET0PSY : I<0, Pseudo, (outs VR256:$dst), (ins), "",
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                   [(set VR256:$dst, (v4f64 immAllZerosV))]>, VEX_4V;
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					                   [(set VR256:$dst, (v8f32 immAllZerosV))]>;
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let ExeDomain = SSEPackedInt in
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					def AVX_SET0PDY : I<0, Pseudo, (outs VR256:$dst), (ins), "",
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def AVX_SET0PI : PDI<0xEF, MRMInitReg, (outs VR128:$dst), (ins), "",
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					                   [(set VR256:$dst, (v4f64 immAllZerosV))]>;
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                 [(set VR128:$dst, (v4i32 immAllZerosV))]>;
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}
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					}
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def : Pat<(v2i64 immAllZerosV), (V_SET0PI)>;
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					def : Pat<(v2i64 immAllZerosV), (V_SET0PI)>;
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@@ -3249,14 +3249,13 @@ def : Pat<(X86MFence), (MFENCE)>;
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// was introduced with SSE2, it's backward compatible.
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					// was introduced with SSE2, it's backward compatible.
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def PAUSE : I<0x90, RawFrm, (outs), (ins), "pause", []>, REP;
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					def PAUSE : I<0x90, RawFrm, (outs), (ins), "pause", []>, REP;
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// Alias instructions that map zero vector to pxor / xorp* for sse.
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					// Alias instructions that map one vector to pcmpeqd for sse2 and above.
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// We set canFoldAsLoad because this can be converted to a constant-pool
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					// We set canFoldAsLoad because this can be converted to a constant-pool
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// load of an all-ones value if folding it would be beneficial.
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					// load of an all-ones value if folding it would be beneficial.
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let isReMaterializable = 1, isAsCheapAsAMove = 1, canFoldAsLoad = 1,
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					let isReMaterializable = 1, isAsCheapAsAMove = 1, canFoldAsLoad = 1,
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    isCodeGenOnly = 1, ExeDomain = SSEPackedInt in
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					    isCodeGenOnly = 1, Predicates = [HasSSE2] in
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  // FIXME: Change encoding to pseudo.
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					  def V_SETALLONES : I<0, Pseudo, (outs VR128:$dst), (ins), "",
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  def V_SETALLONES : PDI<0x76, MRMInitReg, (outs VR128:$dst), (ins), "",
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					                       [(set VR128:$dst, (v4i32 immAllOnesV))], SSEPackedInt>;
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                         [(set VR128:$dst, (v4i32 immAllOnesV))]>;
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//===---------------------------------------------------------------------===//
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					//===---------------------------------------------------------------------===//
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// SSE3 - Conversion Instructions
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					// SSE3 - Conversion Instructions
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