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[ms-inline asm] Expose the ErrorInfo from the MatchInstructionImpl. In general,

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this is the index of the operand that failed to match.

Note: This may cause a buildbot failure due to an API mismatch in clang.  Should
recover with my next commit to clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162295 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chad Rosier 2012-08-21 18:14:59 +00:00
parent 4c1d2baa7c
commit 64bfcbbc58
2 changed files with 9 additions and 5 deletions
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4
include/llvm/MC/MCTargetAsmParser.h
View File

@ -88,7 +88,9 @@ public:
virtual bool virtual bool
MatchInstruction(SMLoc IDLoc, MatchInstruction(SMLoc IDLoc,
SmallVectorImpl<MCParsedAsmOperand*> &Operands, SmallVectorImpl<MCParsedAsmOperand*> &Operands,
SmallVectorImpl<MCInst> &MCInsts) { SmallVectorImpl<MCInst> &MCInsts,
unsigned &OrigErrorInfo) {
OrigErrorInfo = ~0x0;
return true; return true;
} }

10
lib/Target/X86/AsmParser/X86AsmParser.cpp
View File

@ -67,7 +67,8 @@ private:
bool MatchInstruction(SMLoc IDLoc, bool MatchInstruction(SMLoc IDLoc,
SmallVectorImpl<MCParsedAsmOperand*> &Operands, SmallVectorImpl<MCParsedAsmOperand*> &Operands,
SmallVectorImpl<MCInst> &MCInsts); SmallVectorImpl<MCInst> &MCInsts,
unsigned &OrigErrorInfo);
/// isSrcOp - Returns true if operand is either (%rsi) or %ds:%(rsi) /// isSrcOp - Returns true if operand is either (%rsi) or %ds:%(rsi)
/// in 64bit mode or (%esi) or %es:(%esi) in 32bit mode. /// in 64bit mode or (%esi) or %es:(%esi) in 32bit mode.
@ -1513,7 +1514,8 @@ MatchAndEmitInstruction(SMLoc IDLoc,
SmallVectorImpl<MCParsedAsmOperand*> &Operands, SmallVectorImpl<MCParsedAsmOperand*> &Operands,
MCStreamer &Out) { MCStreamer &Out) {
SmallVector<MCInst, 2> Insts; SmallVector<MCInst, 2> Insts;
bool Error = MatchInstruction(IDLoc, Operands, Insts); unsigned ErrorInfo;
bool Error = MatchInstruction(IDLoc, Operands, Insts, ErrorInfo);
if (!Error) if (!Error)
for (unsigned i = 0, e = Insts.size(); i != e; ++i) for (unsigned i = 0, e = Insts.size(); i != e; ++i)
Out.EmitInstruction(Insts[i]); Out.EmitInstruction(Insts[i]);
@ -1523,7 +1525,8 @@ MatchAndEmitInstruction(SMLoc IDLoc,
bool X86AsmParser:: bool X86AsmParser::
MatchInstruction(SMLoc IDLoc, MatchInstruction(SMLoc IDLoc,
SmallVectorImpl<MCParsedAsmOperand*> &Operands, SmallVectorImpl<MCParsedAsmOperand*> &Operands,
SmallVectorImpl<MCInst> &MCInsts) { SmallVectorImpl<MCInst> &MCInsts,
unsigned &OrigErrorInfo) {
assert(!Operands.empty() && "Unexpect empty operand list!"); assert(!Operands.empty() && "Unexpect empty operand list!");
X86Operand *Op = static_cast<X86Operand*>(Operands[0]); X86Operand *Op = static_cast<X86Operand*>(Operands[0]);
assert(Op->isToken() && "Leading operand should always be a mnemonic!"); assert(Op->isToken() && "Leading operand should always be a mnemonic!");
@ -1558,7 +1561,6 @@ MatchInstruction(SMLoc IDLoc,
} }
bool WasOriginallyInvalidOperand = false; bool WasOriginallyInvalidOperand = false;
unsigned OrigErrorInfo;
MCInst Inst; MCInst Inst;
// First, try a direct match. // First, try a direct match.