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bugfix: When the source register of CALL_NOLINK was LR, the following code was emitted:

Browse Source 
mov lr, pc
    bx lr
So, the function was not called.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35218 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Lauro Ramos Venancio 2007-03-20 17:57:23 +00:00
parent 431b4d51a7
commit 64c88d741e
4 changed files with 81 additions and 19 deletions
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29
lib/Target/ARM/ARMISelLowering.cpp
View File

@ -544,6 +544,24 @@ SDOperand ARMTargetLowering::LowerCALL(SDOperand Op, SelectionDAG &DAG) {
Callee = DAG.getTargetExternalSymbol(Sym, getPointerTy());
}
// FIXME: handle tail calls differently.
unsigned CallOpc;
if (Subtarget->isThumb()) {
if (!Subtarget->hasV5TOps() && (!isDirect || isARMFunc))
CallOpc = ARMISD::CALL_NOLINK;
else
CallOpc = isARMFunc ? ARMISD::CALL : ARMISD::tCALL;
} else {
CallOpc = (isDirect || Subtarget->hasV5TOps())
? ARMISD::CALL : ARMISD::CALL_NOLINK;
}
if (CallOpc == ARMISD::CALL_NOLINK) {
// On CALL_NOLINK we must move PC to LR
Chain = DAG.getCopyToReg(Chain, ARM::LR,
DAG.getRegister(ARM::PC, MVT::i32), InFlag);
InFlag = Chain.getValue(1);
}
std::vector<MVT::ValueType> NodeTys;
NodeTys.push_back(MVT::Other); // Returns a chain
NodeTys.push_back(MVT::Flag); // Returns a flag for retval copy to use.
@ -558,17 +576,6 @@ SDOperand ARMTargetLowering::LowerCALL(SDOperand Op, SelectionDAG &DAG) {
Ops.push_back(DAG.getRegister(RegsToPass[i].first,
RegsToPass[i].second.getValueType()));
// FIXME: handle tail calls differently.
unsigned CallOpc;
if (Subtarget->isThumb()) {
if (!Subtarget->hasV5TOps() && (!isDirect || isARMFunc))
CallOpc = ARMISD::CALL_NOLINK;
else
CallOpc = isARMFunc ? ARMISD::CALL : ARMISD::tCALL;
} else {
CallOpc = (isDirect || Subtarget->hasV5TOps())
? ARMISD::CALL : ARMISD::CALL_NOLINK;
}
if (InFlag.Val)
Ops.push_back(InFlag);
Chain = DAG.getNode(CallOpc, NodeTys, &Ops[0], Ops.size());

10
lib/Target/ARM/ARMInstrInfo.td
View File

@ -370,8 +370,6 @@ class AI3<dag ops, string asm, list<dag> pattern>
: I<ops, AddrMode3, Size4Bytes, IndexModeNone, asm, "", pattern>;
class AI4<dag ops, string asm, list<dag> pattern>
: I<ops, AddrMode4, Size4Bytes, IndexModeNone, asm, "", pattern>;
class AIx2<dag ops, string asm, list<dag> pattern>
: I<ops, AddrModeNone, Size8Bytes, IndexModeNone, asm, "", pattern>;
class AI1x2<dag ops, string asm, list<dag> pattern>
: I<ops, AddrMode1, Size8Bytes, IndexModeNone, asm, "", pattern>;
@ -546,10 +544,12 @@ let isCall = 1, noResults = 1,
def BLX : AI<(ops GPR:$dst, variable_ops),
"blx $dst",
[(ARMcall GPR:$dst)]>, Requires<[IsARM, HasV5T]>;
// ARMv4T
def BX : AIx2<(ops GPR:$dst, variable_ops),
"mov lr, pc\n\tbx $dst",
let Uses = [LR] in {
// ARMv4T
def BX : AI<(ops GPR:$dst, variable_ops),
"bx $dst",
[(ARMcall_nolink GPR:$dst)]>;
}
}
let isBranch = 1, isTerminator = 1, isBarrier = 1 in {

8
lib/Target/ARM/ARMInstrThumb.td
View File

@ -189,10 +189,12 @@ let isCall = 1, noResults = 1,
def tBLXr : TI<(ops GPR:$dst, variable_ops),
"blx $dst",
[(ARMtcall GPR:$dst)]>, Requires<[HasV5T]>;
// ARMv4T
def tBX : TIx2<(ops GPR:$dst, variable_ops),
"cpy lr, pc\n\tbx $dst",
let Uses = [LR] in {
// ARMv4T
def tBX : TI<(ops GPR:$dst, variable_ops),
"bx $dst",
[(ARMcall_nolink GPR:$dst)]>;
}
}
let isBranch = 1, isTerminator = 1, isBarrier = 1 in {

53
test/CodeGen/ARM/call_nolink.ll Normal file
View File

@ -0,0 +1,53 @@
; RUN: llvm-as < %s | llc -march=arm &&
; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi | not grep "bx lr"
%struct.anon = type { i32 (i32, i32, i32)*, i32, i32, [3 x i32], i8*, i8*, i8* }
@r = external global [14 x i32] ; <[14 x i32]*> [#uses=4]
@isa = external global [13 x %struct.anon] ; <[13 x %struct.anon]*> [#uses=1]
@pgm = external global [2 x { i32, [3 x i32] }] ; <[2 x { i32, [3 x i32] }]*> [#uses=4]
@numi = external global i32 ; <i32*> [#uses=1]
@counter = external global [2 x i32] ; <[2 x i32]*> [#uses=1]
implementation ; Functions:
define void @main_bb_2E_i_bb205_2E_i_2E_i_bb115_2E_i_2E_i() {
newFuncRoot:
br label %bb115.i.i
bb115.i.i.bb170.i.i_crit_edge.exitStub: ; preds = %bb115.i.i
ret void
bb115.i.i.bb115.i.i_crit_edge: ; preds = %bb115.i.i
br label %bb115.i.i
bb115.i.i: ; preds = %bb115.i.i.bb115.i.i_crit_edge, %newFuncRoot
%i_addr.3210.0.i.i = phi i32 [ %tmp166.i.i, %bb115.i.i.bb115.i.i_crit_edge ], [ 0, %newFuncRoot ] ; <i32> [#uses=7]
%tmp124.i.i = getelementptr [2 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %i_addr.3210.0.i.i, i32 1, i32 0 ; <i32*> [#uses=1]
%tmp125.i.i = load i32* %tmp124.i.i ; <i32> [#uses=1]
%tmp126.i.i = getelementptr [14 x i32]* @r, i32 0, i32 %tmp125.i.i ; <i32*> [#uses=1]
%tmp127.i.i = load i32* %tmp126.i.i ; <i32> [#uses=1]
%tmp131.i.i = getelementptr [2 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %i_addr.3210.0.i.i, i32 1, i32 1 ; <i32*> [#uses=1]
%tmp132.i.i = load i32* %tmp131.i.i ; <i32> [#uses=1]
%tmp133.i.i = getelementptr [14 x i32]* @r, i32 0, i32 %tmp132.i.i ; <i32*> [#uses=1]
%tmp134.i.i = load i32* %tmp133.i.i ; <i32> [#uses=1]
%tmp138.i.i = getelementptr [2 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %i_addr.3210.0.i.i, i32 1, i32 2 ; <i32*> [#uses=1]
%tmp139.i.i = load i32* %tmp138.i.i ; <i32> [#uses=1]
%tmp140.i.i = getelementptr [14 x i32]* @r, i32 0, i32 %tmp139.i.i ; <i32*> [#uses=1]
%tmp141.i.i = load i32* %tmp140.i.i ; <i32> [#uses=1]
%tmp143.i.i = add i32 %i_addr.3210.0.i.i, 12 ; <i32> [#uses=1]
%tmp146.i.i = getelementptr [2 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %i_addr.3210.0.i.i, i32 0 ; <i32*> [#uses=1]
%tmp147.i.i = load i32* %tmp146.i.i ; <i32> [#uses=1]
%tmp149.i.i = getelementptr [13 x %struct.anon]* @isa, i32 0, i32 %tmp147.i.i, i32 0 ; <i32 (i32, i32, i32)**> [#uses=1]
%tmp150.i.i = load i32 (i32, i32, i32)** %tmp149.i.i ; <i32 (i32, i32, i32)*> [#uses=1]
%tmp154.i.i = tail call i32 %tmp150.i.i( i32 %tmp127.i.i, i32 %tmp134.i.i, i32 %tmp141.i.i ) ; <i32> [#uses=1]
%tmp155.i.i = getelementptr [14 x i32]* @r, i32 0, i32 %tmp143.i.i ; <i32*> [#uses=1]
store i32 %tmp154.i.i, i32* %tmp155.i.i
%tmp159.i.i = getelementptr [2 x i32]* @counter, i32 0, i32 %i_addr.3210.0.i.i ; <i32*> [#uses=2]
%tmp160.i.i = load i32* %tmp159.i.i ; <i32> [#uses=1]
%tmp161.i.i = add i32 %tmp160.i.i, 1 ; <i32> [#uses=1]
store i32 %tmp161.i.i, i32* %tmp159.i.i
%tmp166.i.i = add i32 %i_addr.3210.0.i.i, 1 ; <i32> [#uses=2]
%tmp168.i.i = load i32* @numi ; <i32> [#uses=1]
icmp slt i32 %tmp166.i.i, %tmp168.i.i ; <i1>:0 [#uses=1]
br i1 %0, label %bb115.i.i.bb115.i.i_crit_edge, label %bb115.i.i.bb170.i.i_crit_edge.exitStub
}