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Add a subtarget hook for reporting the misprediction penalty. Use this to provide more precise

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cost modeling for if-conversion.  Now if only we had a way to estimate the misprediction probability.

Adjsut CodeGen/ARM/ifcvt10.ll.  The pipeline on Cortex-A8 is long enough that it is still profitable
to predicate an ldm, but the shorter pipeline on Cortex-A9 makes it unprofitable.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114995 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Owen Anderson 2010-09-28 21:57:50 +00:00
parent fd60980eb2
commit 654d5440a4
4 changed files with 19 additions and 3 deletions
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6
lib/Target/ARM/ARMBaseInstrInfo.cpp
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@ -1203,7 +1203,8 @@ bool ARMBaseInstrInfo::isProfitableToIfCvt(MachineBasicBlock &MBB,
// Attempt to estimate the relative costs of predication versus branching. // Attempt to estimate the relative costs of predication versus branching.
float UnpredCost = Probability * NumInstrs; float UnpredCost = Probability * NumInstrs;
UnpredCost += 2.0; // FIXME: Should model a misprediction cost. UnpredCost += 1.0; // The branch itself
UnpredCost += 0.1 * Subtarget.getMispredictionPenalty();
float PredCost = NumInstrs; float PredCost = NumInstrs;
@ -1220,7 +1221,8 @@ isProfitableToIfCvt(MachineBasicBlock &TMBB, unsigned NumT,
// Attempt to estimate the relative costs of predication versus branching. // Attempt to estimate the relative costs of predication versus branching.
float UnpredCost = Probability * NumT + (1.0 - Probability) * NumF; float UnpredCost = Probability * NumT + (1.0 - Probability) * NumF;
UnpredCost += 2.0; // FIXME: Should model a misprediction cost. UnpredCost += 1.0; // The branch itself
UnpredCost += 0.1 * Subtarget.getMispredictionPenalty();
float PredCost = NumT + NumF; float PredCost = NumT + NumF;

12
lib/Target/ARM/ARMSubtarget.cpp
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@ -185,6 +185,18 @@ ARMSubtarget::GVIsIndirectSymbol(const GlobalValue *GV,
return false; return false;
} }
unsigned ARMSubtarget::getMispredictionPenalty() const {
// If we have a reasonable estimate of the pipeline depth, then we can
// estimate the penalty of a misprediction based on that.
if (isCortexA8())
return 13;
else if (isCortexA9())
return 8;
// Otherwise, just return a sensible default.
return 10;
}
bool ARMSubtarget::enablePostRAScheduler( bool ARMSubtarget::enablePostRAScheduler(
CodeGenOpt::Level OptLevel, CodeGenOpt::Level OptLevel,
TargetSubtarget::AntiDepBreakMode& Mode, TargetSubtarget::AntiDepBreakMode& Mode,

2
lib/Target/ARM/ARMSubtarget.h
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@ -194,6 +194,8 @@ protected:
const std::string & getCPUString() const { return CPUString; } const std::string & getCPUString() const { return CPUString; }
unsigned getMispredictionPenalty() const;
/// enablePostRAScheduler - True at 'More' optimization. /// enablePostRAScheduler - True at 'More' optimization.
bool enablePostRAScheduler(CodeGenOpt::Level OptLevel, bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
TargetSubtarget::AntiDepBreakMode& Mode, TargetSubtarget::AntiDepBreakMode& Mode,

2
test/CodeGen/ARM/ifcvt10.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -mtriple=arm-apple-darwin -mcpu=cortex-a8 | FileCheck %s ; RUN: llc < %s -mtriple=arm-apple-darwin -mcpu=cortex-a9 | FileCheck %s
; rdar://8402126 ; rdar://8402126
; Make sure if-converter is not predicating vldmia and ldmia. These are ; Make sure if-converter is not predicating vldmia and ldmia. These are
; micro-coded and would have long issue latency even if predicated on ; micro-coded and would have long issue latency even if predicated on