Retype from unsigned to CallingConv::ID accordingly. Approved by Bob Wilson.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80773 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Sandeep Patel
2009-09-02 08:44:58 +00:00
parent 25f1992cf5
commit 65c3c8f323
43 changed files with 214 additions and 181 deletions

View File

@@ -611,7 +611,7 @@ SDValue XCoreTargetLowering::LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) {
/// XCore call implementation
SDValue
XCoreTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
bool isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,
@@ -636,7 +636,7 @@ XCoreTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
/// TODO: isTailCall, sret.
SDValue
XCoreTargetLowering::LowerCCCCallTo(SDValue Chain, SDValue Callee,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
bool isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,
@@ -761,7 +761,7 @@ XCoreTargetLowering::LowerCCCCallTo(SDValue Chain, SDValue Callee,
/// appropriate copies out of appropriate physical registers.
SDValue
XCoreTargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
SmallVectorImpl<SDValue> &InVals) {
@@ -791,7 +791,7 @@ XCoreTargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag,
/// XCore formal arguments implementation
SDValue
XCoreTargetLowering::LowerFormalArguments(SDValue Chain,
unsigned CallConv,
CallingConv::ID CallConv,
bool isVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl,
@@ -814,7 +814,7 @@ XCoreTargetLowering::LowerFormalArguments(SDValue Chain,
/// TODO: sret
SDValue
XCoreTargetLowering::LowerCCCArguments(SDValue Chain,
unsigned CallConv,
CallingConv::ID CallConv,
bool isVarArg,
const SmallVectorImpl<ISD::InputArg>
&Ins,
@@ -928,7 +928,7 @@ XCoreTargetLowering::LowerCCCArguments(SDValue Chain,
SDValue
XCoreTargetLowering::LowerReturn(SDValue Chain,
unsigned CallConv, bool isVarArg,
CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<ISD::OutputArg> &Outs,
DebugLoc dl, SelectionDAG &DAG) {