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https://github.com/c64scene-ar/llvm-6502.git
synced 2025-09-27 16:17:17 +00:00
CalculateSpillWeights does not need to be a pass
Based on discussions with Lang Hames and Jakob Stoklund Olesen at the hacker's lab, and in the light of upcoming work on the PBQP register allocator, it was though that CalcSpillWeights does not need to be a pass. This change will enable to customize / tune the spill weight computation depending on the allocator. Update the documentation style while there. No functionnal change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194269 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -21,7 +21,9 @@ namespace llvm {
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class MachineBlockFrequencyInfo;
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class MachineBlockFrequencyInfo;
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class MachineLoopInfo;
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class MachineLoopInfo;
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/// normalizeSpillWeight - The spill weight of a live interval is computed as:
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/// \brief Normalize the spill weight of a live interval
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///
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/// The spill weight of a live interval is computed as:
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///
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///
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/// (sum(use freq) + sum(def freq)) / (K + size)
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/// (sum(use freq) + sum(def freq)) / (K + size)
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///
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///
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@@ -38,8 +40,8 @@ namespace llvm {
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return UseDefFreq / (Size + 25*SlotIndex::InstrDist);
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return UseDefFreq / (Size + 25*SlotIndex::InstrDist);
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}
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}
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/// VirtRegAuxInfo - Calculate auxiliary information for a virtual
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/// \brief Calculate auxiliary information for a virtual register such as its
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/// register such as its spill weight and allocation hint.
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/// spill weight and allocation hint.
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class VirtRegAuxInfo {
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class VirtRegAuxInfo {
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MachineFunction &MF;
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MachineFunction &MF;
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LiveIntervals &LIS;
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LiveIntervals &LIS;
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@@ -52,29 +54,16 @@ namespace llvm {
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const MachineBlockFrequencyInfo &mbfi)
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const MachineBlockFrequencyInfo &mbfi)
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: MF(mf), LIS(lis), Loops(loops), MBFI(mbfi) {}
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: MF(mf), LIS(lis), Loops(loops), MBFI(mbfi) {}
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/// CalculateWeightAndHint - (re)compute li's spill weight and allocation
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/// \brief (re)compute li's spill weight and allocation hint.
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/// hint.
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void CalculateWeightAndHint(LiveInterval &li);
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void CalculateWeightAndHint(LiveInterval &li);
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};
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};
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/// CalculateSpillWeights - Compute spill weights for all virtual register
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/// \brief Compute spill weights and allocation hints for all virtual register
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/// live intervals.
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/// live intervals.
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class CalculateSpillWeights : public MachineFunctionPass {
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void calculateSpillWeights(LiveIntervals &LIS,
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public:
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MachineFunction &MF,
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static char ID;
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const MachineLoopInfo &MLI,
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const MachineBlockFrequencyInfo &MBFI);
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CalculateSpillWeights() : MachineFunctionPass(ID) {
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initializeCalculateSpillWeightsPass(*PassRegistry::getPassRegistry());
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}
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virtual void getAnalysisUsage(AnalysisUsage &au) const;
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virtual bool runOnMachineFunction(MachineFunction &fn);
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private:
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/// Returns true if the given live interval is zero length.
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bool isZeroLengthInterval(LiveInterval *li) const;
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};
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}
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}
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@@ -89,7 +89,6 @@ void initializeCFGSimplifyPassPass(PassRegistry&);
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void initializeFlattenCFGPassPass(PassRegistry&);
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void initializeFlattenCFGPassPass(PassRegistry&);
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void initializeStructurizeCFGPass(PassRegistry&);
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void initializeStructurizeCFGPass(PassRegistry&);
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void initializeCFGViewerPass(PassRegistry&);
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void initializeCFGViewerPass(PassRegistry&);
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void initializeCalculateSpillWeightsPass(PassRegistry&);
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void initializeCodeGenPreparePass(PassRegistry&);
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void initializeCodeGenPreparePass(PassRegistry&);
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void initializeConstantMergePass(PassRegistry&);
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void initializeConstantMergePass(PassRegistry&);
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void initializeConstantPropagationPass(PassRegistry&);
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void initializeConstantPropagationPass(PassRegistry&);
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@@ -22,38 +22,21 @@
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#include "llvm/Target/TargetRegisterInfo.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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using namespace llvm;
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using namespace llvm;
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char CalculateSpillWeights::ID = 0;
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void llvm::calculateSpillWeights(LiveIntervals &LIS,
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INITIALIZE_PASS_BEGIN(CalculateSpillWeights, "calcspillweights",
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MachineFunction &MF,
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"Calculate spill weights", false, false)
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const MachineLoopInfo &MLI,
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INITIALIZE_PASS_DEPENDENCY(LiveIntervals)
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const MachineBlockFrequencyInfo &MBFI) {
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INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
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INITIALIZE_PASS_END(CalculateSpillWeights, "calcspillweights",
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"Calculate spill weights", false, false)
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void CalculateSpillWeights::getAnalysisUsage(AnalysisUsage &au) const {
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au.addRequired<LiveIntervals>();
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au.addRequired<MachineBlockFrequencyInfo>();
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au.addRequired<MachineLoopInfo>();
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au.setPreservesAll();
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MachineFunctionPass::getAnalysisUsage(au);
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}
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bool CalculateSpillWeights::runOnMachineFunction(MachineFunction &MF) {
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DEBUG(dbgs() << "********** Compute Spill Weights **********\n"
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DEBUG(dbgs() << "********** Compute Spill Weights **********\n"
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<< "********** Function: " << MF.getName() << '\n');
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<< "********** Function: " << MF.getName() << '\n');
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LiveIntervals &LIS = getAnalysis<LiveIntervals>();
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MachineRegisterInfo &MRI = MF.getRegInfo();
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MachineRegisterInfo &MRI = MF.getRegInfo();
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VirtRegAuxInfo VRAI(MF, LIS, getAnalysis<MachineLoopInfo>(),
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VirtRegAuxInfo VRAI(MF, LIS, MLI, MBFI);
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getAnalysis<MachineBlockFrequencyInfo>());
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for (unsigned i = 0, e = MRI.getNumVirtRegs(); i != e; ++i) {
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for (unsigned i = 0, e = MRI.getNumVirtRegs(); i != e; ++i) {
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unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
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unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
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if (MRI.reg_nodbg_empty(Reg))
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if (MRI.reg_nodbg_empty(Reg))
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continue;
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continue;
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VRAI.CalculateWeightAndHint(LIS.getInterval(Reg));
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VRAI.CalculateWeightAndHint(LIS.getInterval(Reg));
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}
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}
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return false;
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}
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}
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// Return the preferred allocation register for reg, given a COPY instruction.
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// Return the preferred allocation register for reg, given a COPY instruction.
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@@ -22,7 +22,6 @@ using namespace llvm;
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void llvm::initializeCodeGen(PassRegistry &Registry) {
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void llvm::initializeCodeGen(PassRegistry &Registry) {
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initializeBasicTTIPass(Registry);
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initializeBasicTTIPass(Registry);
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initializeBranchFolderPassPass(Registry);
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initializeBranchFolderPassPass(Registry);
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initializeCalculateSpillWeightsPass(Registry);
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initializeDeadMachineInstructionElimPass(Registry);
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initializeDeadMachineInstructionElimPass(Registry);
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initializeEarlyIfConverterPass(Registry);
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initializeEarlyIfConverterPass(Registry);
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initializeExpandPostRAPass(Registry);
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initializeExpandPostRAPass(Registry);
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@@ -126,7 +126,6 @@ RABasic::RABasic(): MachineFunctionPass(ID) {
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initializeSlotIndexesPass(*PassRegistry::getPassRegistry());
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initializeSlotIndexesPass(*PassRegistry::getPassRegistry());
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initializeRegisterCoalescerPass(*PassRegistry::getPassRegistry());
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initializeRegisterCoalescerPass(*PassRegistry::getPassRegistry());
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initializeMachineSchedulerPass(*PassRegistry::getPassRegistry());
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initializeMachineSchedulerPass(*PassRegistry::getPassRegistry());
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initializeCalculateSpillWeightsPass(*PassRegistry::getPassRegistry());
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initializeLiveStacksPass(*PassRegistry::getPassRegistry());
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initializeLiveStacksPass(*PassRegistry::getPassRegistry());
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initializeMachineDominatorTreePass(*PassRegistry::getPassRegistry());
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initializeMachineDominatorTreePass(*PassRegistry::getPassRegistry());
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initializeMachineLoopInfoPass(*PassRegistry::getPassRegistry());
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initializeMachineLoopInfoPass(*PassRegistry::getPassRegistry());
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@@ -143,7 +142,6 @@ void RABasic::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addPreserved<SlotIndexes>();
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AU.addPreserved<SlotIndexes>();
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AU.addRequired<LiveDebugVariables>();
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AU.addRequired<LiveDebugVariables>();
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AU.addPreserved<LiveDebugVariables>();
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AU.addPreserved<LiveDebugVariables>();
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AU.addRequired<CalculateSpillWeights>();
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AU.addRequired<LiveStacks>();
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AU.addRequired<LiveStacks>();
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AU.addPreserved<LiveStacks>();
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AU.addPreserved<LiveStacks>();
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AU.addRequired<MachineBlockFrequencyInfo>();
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AU.addRequired<MachineBlockFrequencyInfo>();
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@@ -315,7 +315,6 @@ RAGreedy::RAGreedy(): MachineFunctionPass(ID) {
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initializeSlotIndexesPass(*PassRegistry::getPassRegistry());
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initializeSlotIndexesPass(*PassRegistry::getPassRegistry());
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initializeRegisterCoalescerPass(*PassRegistry::getPassRegistry());
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initializeRegisterCoalescerPass(*PassRegistry::getPassRegistry());
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initializeMachineSchedulerPass(*PassRegistry::getPassRegistry());
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initializeMachineSchedulerPass(*PassRegistry::getPassRegistry());
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initializeCalculateSpillWeightsPass(*PassRegistry::getPassRegistry());
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initializeLiveStacksPass(*PassRegistry::getPassRegistry());
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initializeLiveStacksPass(*PassRegistry::getPassRegistry());
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initializeMachineDominatorTreePass(*PassRegistry::getPassRegistry());
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initializeMachineDominatorTreePass(*PassRegistry::getPassRegistry());
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initializeMachineLoopInfoPass(*PassRegistry::getPassRegistry());
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initializeMachineLoopInfoPass(*PassRegistry::getPassRegistry());
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@@ -339,7 +338,6 @@ void RAGreedy::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addPreserved<LiveDebugVariables>();
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AU.addPreserved<LiveDebugVariables>();
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AU.addRequired<LiveStacks>();
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AU.addRequired<LiveStacks>();
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AU.addPreserved<LiveStacks>();
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AU.addPreserved<LiveStacks>();
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AU.addRequired<CalculateSpillWeights>();
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AU.addRequired<MachineDominatorTree>();
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AU.addRequired<MachineDominatorTree>();
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AU.addPreserved<MachineDominatorTree>();
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AU.addPreserved<MachineDominatorTree>();
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AU.addRequired<MachineLoopInfo>();
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AU.addRequired<MachineLoopInfo>();
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@@ -1840,6 +1838,8 @@ bool RAGreedy::runOnMachineFunction(MachineFunction &mf) {
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SpillPlacer = &getAnalysis<SpillPlacement>();
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SpillPlacer = &getAnalysis<SpillPlacement>();
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DebugVars = &getAnalysis<LiveDebugVariables>();
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DebugVars = &getAnalysis<LiveDebugVariables>();
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calculateSpillWeights(*LIS, mf, *Loops, *MBFI);
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DEBUG(LIS->dump());
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DEBUG(LIS->dump());
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SA.reset(new SplitAnalysis(*VRM, *LIS, *Loops));
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SA.reset(new SplitAnalysis(*VRM, *LIS, *Loops));
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@@ -95,7 +95,6 @@ public:
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: MachineFunctionPass(ID), builder(b.take()), customPassID(cPassID) {
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: MachineFunctionPass(ID), builder(b.take()), customPassID(cPassID) {
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initializeSlotIndexesPass(*PassRegistry::getPassRegistry());
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initializeSlotIndexesPass(*PassRegistry::getPassRegistry());
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initializeLiveIntervalsPass(*PassRegistry::getPassRegistry());
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initializeLiveIntervalsPass(*PassRegistry::getPassRegistry());
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initializeCalculateSpillWeightsPass(*PassRegistry::getPassRegistry());
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initializeLiveStacksPass(*PassRegistry::getPassRegistry());
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initializeLiveStacksPass(*PassRegistry::getPassRegistry());
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initializeVirtRegMapPass(*PassRegistry::getPassRegistry());
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initializeVirtRegMapPass(*PassRegistry::getPassRegistry());
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}
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}
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@@ -432,7 +431,6 @@ void RegAllocPBQP::getAnalysisUsage(AnalysisUsage &au) const {
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//au.addRequiredID(SplitCriticalEdgesID);
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//au.addRequiredID(SplitCriticalEdgesID);
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if (customPassID)
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if (customPassID)
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au.addRequiredID(*customPassID);
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au.addRequiredID(*customPassID);
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au.addRequired<CalculateSpillWeights>();
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au.addRequired<LiveStacks>();
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au.addRequired<LiveStacks>();
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au.addPreserved<LiveStacks>();
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au.addPreserved<LiveStacks>();
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au.addRequired<MachineBlockFrequencyInfo>();
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au.addRequired<MachineBlockFrequencyInfo>();
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@@ -551,6 +549,8 @@ bool RegAllocPBQP::runOnMachineFunction(MachineFunction &MF) {
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lss = &getAnalysis<LiveStacks>();
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lss = &getAnalysis<LiveStacks>();
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mbfi = &getAnalysis<MachineBlockFrequencyInfo>();
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mbfi = &getAnalysis<MachineBlockFrequencyInfo>();
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calculateSpillWeights(*lis, MF, getAnalysis<MachineLoopInfo>(), *mbfi);
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vrm = &getAnalysis<VirtRegMap>();
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vrm = &getAnalysis<VirtRegMap>();
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spiller.reset(createInlineSpiller(*this, MF, *vrm));
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spiller.reset(createInlineSpiller(*this, MF, *vrm));
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