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Add some encoding for the adr instruction. Labels still need to be finished.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120365 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1241,14 +1241,24 @@ def tMOVCCi : T1pIt<(outs tGPR:$dst), (ins tGPR:$lhs, i32imm:$rhs), IIC_iCMOVi,
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// tLEApcrel - Load a pc-relative address into a register without offending the
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// assembler.
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let neverHasSideEffects = 1, isReMaterializable = 1 in
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def tLEApcrel : T1I<(outs tGPR:$dst), (ins i32imm:$label, pred:$p), IIC_iALUi,
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"adr${p}\t$dst, #$label", []>,
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T1Encoding<{1,0,1,0,0,?}>; // A6.2 & A8.6.10
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def tLEApcrel : T1I<(outs tGPR:$Rd), (ins i32imm:$label, pred:$p), IIC_iALUi,
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"adr${p}\t$Rd, #$label", []>,
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T1Encoding<{1,0,1,0,0,?}> {
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// A6.2 & A8.6.10
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bits<3> Rd;
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let Inst{10-8} = Rd;
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// FIXME: Add label encoding/fixup
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}
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def tLEApcrelJT : T1I<(outs tGPR:$dst),
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def tLEApcrelJT : T1I<(outs tGPR:$Rd),
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(ins i32imm:$label, nohash_imm:$id, pred:$p),
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IIC_iALUi, "adr${p}\t$dst, #${label}_${id}", []>,
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T1Encoding<{1,0,1,0,0,?}>; // A6.2 & A8.6.10
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IIC_iALUi, "adr${p}\t$Rd, #${label}_${id}", []>,
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T1Encoding<{1,0,1,0,0,?}> {
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// A6.2 & A8.6.10
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bits<3> Rd;
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let Inst{10-8} = Rd;
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// FIXME: Add label encoding/fixup
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}
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//===----------------------------------------------------------------------===//
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// TLS Instructions
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