mirror of
https://github.com/c64scene-ar/llvm-6502.git
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Recognize SSE min and max opportunities in even more cases.
And fix a bug with the behavior of min/max instructions formed from fcmp uge comparisons. Also, use FiniteOnlyFPMath() for this code instead of UnsafeFPMath, as it is more specific. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82466 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman
parent
b29ff977d1
commit
670e53977b
@ -8256,76 +8256,158 @@ static SDValue PerformSELECTCombine(SDNode *N, SelectionDAG &DAG,
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SDValue LHS = N->getOperand(1);
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SDValue RHS = N->getOperand(2);
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// If we have SSE[12] support, try to form min/max nodes.
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// If we have SSE[12] support, try to form min/max nodes. SSE min/max
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// instructions have the peculiarity that if either operand is a NaN,
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// they chose what we call the RHS operand (and as such are not symmetric).
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// It happens that this matches the semantics of the common C idiom
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// x<y?x:y and related forms, so we can recognize these cases.
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if (Subtarget->hasSSE2() &&
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(LHS.getValueType() == MVT::f32 || LHS.getValueType() == MVT::f64) &&
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Cond.getOpcode() == ISD::SETCC) {
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ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get();
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unsigned Opcode = 0;
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// Check for x CC y ? x : y.
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if (LHS == Cond.getOperand(0) && RHS == Cond.getOperand(1)) {
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switch (CC) {
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default: break;
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case ISD::SETOLE: // (X <= Y) ? X : Y -> min
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case ISD::SETULT:
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// This can be a min if we can prove that at least one of the operands
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// is not a nan.
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if (!FiniteOnlyFPMath()) {
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if (DAG.isKnownNeverNaN(RHS)) {
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// Put the potential NaN in the RHS so that SSE will preserve it.
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std::swap(LHS, RHS);
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} else if (!DAG.isKnownNeverNaN(LHS))
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break;
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}
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Opcode = X86ISD::FMIN;
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break;
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case ISD::SETOLE:
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// This can be a min if we can prove that at least one of the operands
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// is not a nan.
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if (!FiniteOnlyFPMath()) {
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if (DAG.isKnownNeverNaN(LHS)) {
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// Put the potential NaN in the RHS so that SSE will preserve it.
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std::swap(LHS, RHS);
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} else if (!DAG.isKnownNeverNaN(RHS))
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break;
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}
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Opcode = X86ISD::FMIN;
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break;
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case ISD::SETULE:
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case ISD::SETLE:
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if (!UnsafeFPMath) break;
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// FALL THROUGH.
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case ISD::SETOLT: // (X olt/lt Y) ? X : Y -> min
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// This can be a min, but if either operand is a NaN we need it to
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// preserve the original LHS.
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std::swap(LHS, RHS);
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case ISD::SETOLT:
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case ISD::SETLT:
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case ISD::SETLE:
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Opcode = X86ISD::FMIN;
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break;
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case ISD::SETOGT: // (X > Y) ? X : Y -> max
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case ISD::SETOGE:
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// This can be a max if we can prove that at least one of the operands
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// is not a nan.
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if (!FiniteOnlyFPMath()) {
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if (DAG.isKnownNeverNaN(LHS)) {
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// Put the potential NaN in the RHS so that SSE will preserve it.
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std::swap(LHS, RHS);
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} else if (!DAG.isKnownNeverNaN(RHS))
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break;
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}
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Opcode = X86ISD::FMAX;
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break;
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case ISD::SETUGT:
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// This can be a max if we can prove that at least one of the operands
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// is not a nan.
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if (!FiniteOnlyFPMath()) {
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if (DAG.isKnownNeverNaN(RHS)) {
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// Put the potential NaN in the RHS so that SSE will preserve it.
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std::swap(LHS, RHS);
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} else if (!DAG.isKnownNeverNaN(LHS))
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break;
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}
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Opcode = X86ISD::FMAX;
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break;
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case ISD::SETUGE:
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// This can be a max, but if either operand is a NaN we need it to
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// preserve the original LHS.
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std::swap(LHS, RHS);
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case ISD::SETOGT:
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case ISD::SETGT:
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if (!UnsafeFPMath) break;
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// FALL THROUGH.
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case ISD::SETUGE: // (X uge/ge Y) ? X : Y -> max
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case ISD::SETGE:
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Opcode = X86ISD::FMAX;
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break;
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}
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// Check for x CC y ? y : x -- a min/max with reversed arms.
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} else if (LHS == Cond.getOperand(1) && RHS == Cond.getOperand(0)) {
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switch (CC) {
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default: break;
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case ISD::SETOGT:
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// This can use a min only if the LHS isn't NaN.
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if (DAG.isKnownNeverNaN(LHS))
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Opcode = X86ISD::FMIN;
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else if (DAG.isKnownNeverNaN(RHS)) {
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Opcode = X86ISD::FMIN;
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// Put the potential NaN in the RHS so that SSE will preserve it.
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std::swap(LHS, RHS);
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case ISD::SETOGE:
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// This can be a min if we can prove that at least one of the operands
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// is not a nan.
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if (!FiniteOnlyFPMath()) {
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if (DAG.isKnownNeverNaN(RHS)) {
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// Put the potential NaN in the RHS so that SSE will preserve it.
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std::swap(LHS, RHS);
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} else if (!DAG.isKnownNeverNaN(LHS))
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break;
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}
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Opcode = X86ISD::FMIN;
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break;
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case ISD::SETUGT: // (X > Y) ? Y : X -> min
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case ISD::SETUGT:
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// This can be a min if we can prove that at least one of the operands
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// is not a nan.
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if (!FiniteOnlyFPMath()) {
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if (DAG.isKnownNeverNaN(LHS)) {
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// Put the potential NaN in the RHS so that SSE will preserve it.
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std::swap(LHS, RHS);
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} else if (!DAG.isKnownNeverNaN(RHS))
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break;
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}
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Opcode = X86ISD::FMIN;
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break;
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case ISD::SETUGE:
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// This can be a min, but if either operand is a NaN we need it to
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// preserve the original LHS.
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std::swap(LHS, RHS);
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case ISD::SETOGT:
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case ISD::SETGT:
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if (!UnsafeFPMath) break;
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// FALL THROUGH.
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case ISD::SETUGE: // (X uge/ge Y) ? Y : X -> min
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case ISD::SETGE:
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Opcode = X86ISD::FMIN;
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break;
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case ISD::SETULE:
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// This can use a max only if the LHS isn't NaN.
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if (DAG.isKnownNeverNaN(LHS))
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Opcode = X86ISD::FMAX;
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else if (DAG.isKnownNeverNaN(RHS)) {
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Opcode = X86ISD::FMAX;
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// Put the potential NaN in the RHS so that SSE will preserve it.
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std::swap(LHS, RHS);
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case ISD::SETULT:
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// This can be a max if we can prove that at least one of the operands
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// is not a nan.
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if (!FiniteOnlyFPMath()) {
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if (DAG.isKnownNeverNaN(LHS)) {
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// Put the potential NaN in the RHS so that SSE will preserve it.
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std::swap(LHS, RHS);
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} else if (!DAG.isKnownNeverNaN(RHS))
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break;
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}
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Opcode = X86ISD::FMAX;
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break;
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case ISD::SETOLE: // (X <= Y) ? Y : X -> max
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case ISD::SETLE:
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if (!UnsafeFPMath) break;
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// FALL THROUGH.
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case ISD::SETOLT: // (X olt/lt Y) ? Y : X -> max
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case ISD::SETOLE:
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// This can be a max if we can prove that at least one of the operands
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// is not a nan.
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if (!FiniteOnlyFPMath()) {
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if (DAG.isKnownNeverNaN(RHS)) {
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// Put the potential NaN in the RHS so that SSE will preserve it.
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std::swap(LHS, RHS);
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} else if (!DAG.isKnownNeverNaN(LHS))
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break;
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}
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Opcode = X86ISD::FMAX;
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break;
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case ISD::SETULE:
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// This can be a max, but if either operand is a NaN we need it to
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// preserve the original LHS.
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std::swap(LHS, RHS);
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case ISD::SETOLT:
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case ISD::SETLT:
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case ISD::SETLE:
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Opcode = X86ISD::FMAX;
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break;
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}
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@ -4,17 +4,17 @@
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declare float @bar()
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define float @foo(float %a)
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define float @foo(float %a) nounwind
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{
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%s = call float @bar()
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%t = fcmp olt float %s, %a
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%u = select i1 %t, float %s, float %a
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ret float %u
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}
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define float @hem(float %a)
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define float @hem(float %a) nounwind
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{
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%s = call float @bar()
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%t = fcmp uge float %s, %a
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%t = fcmp ogt float %s, %a
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%u = select i1 %t, float %s, float %a
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ret float %u
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}
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@ -1,4 +1,323 @@
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; RUN: llc < %s -march=x86-64 | FileCheck %s
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; RUN: llc < %s -march=x86-64 -asm-verbose=false | FileCheck %s
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; Some of these patterns can be matched as SSE min or max. Some of
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; then can be matched provided that the operands are swapped.
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; Some of them can't be matched at all and require a comparison
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; and a conditional branch.
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; The naming convention is {,x_}{o,u}{gt,lt,ge,le}{,_inverse}
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; x_ : use 0.0 instead of %y
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; _inverse : swap the arms of the select.
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; CHECK: ogt:
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; CHECK-NEXT: maxsd %xmm1, %xmm0
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; CHECK-NEXT: ret
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define double @ogt(double %x, double %y) nounwind {
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%c = fcmp ogt double %x, %y
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%d = select i1 %c, double %x, double %y
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ret double %d
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}
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; CHECK: olt:
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; CHECK-NEXT: minsd %xmm1, %xmm0
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; CHECK-NEXT: ret
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define double @olt(double %x, double %y) nounwind {
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%c = fcmp olt double %x, %y
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%d = select i1 %c, double %x, double %y
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ret double %d
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}
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; CHECK: ogt_inverse:
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; CHECK-NEXT: minsd %xmm0, %xmm1
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; CHECK-NEXT: movapd %xmm1, %xmm0
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; CHECK-NEXT: ret
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define double @ogt_inverse(double %x, double %y) nounwind {
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%c = fcmp ogt double %x, %y
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%d = select i1 %c, double %y, double %x
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ret double %d
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}
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; CHECK: olt_inverse:
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; CHECK-NEXT: maxsd %xmm0, %xmm1
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; CHECK-NEXT: movapd %xmm1, %xmm0
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; CHECK-NEXT: ret
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define double @olt_inverse(double %x, double %y) nounwind {
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%c = fcmp olt double %x, %y
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%d = select i1 %c, double %y, double %x
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ret double %d
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}
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; CHECK: oge:
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; CHECK-NEXT: ucomisd %xmm1, %xmm0
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define double @oge(double %x, double %y) nounwind {
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%c = fcmp oge double %x, %y
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%d = select i1 %c, double %x, double %y
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ret double %d
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}
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; CHECK: ole:
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; CHECK-NEXT: ucomisd %xmm0, %xmm1
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define double @ole(double %x, double %y) nounwind {
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%c = fcmp ole double %x, %y
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%d = select i1 %c, double %x, double %y
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ret double %d
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}
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; CHECK: oge_inverse:
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; CHECK-NEXT: ucomisd %xmm1, %xmm0
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define double @oge_inverse(double %x, double %y) nounwind {
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%c = fcmp oge double %x, %y
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%d = select i1 %c, double %y, double %x
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ret double %d
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}
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; CHECK: ole_inverse:
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; CHECK-NEXT: ucomisd %xmm0, %xmm1
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define double @ole_inverse(double %x, double %y) nounwind {
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%c = fcmp ole double %x, %y
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%d = select i1 %c, double %y, double %x
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ret double %d
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}
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; CHECK: x_ogt:
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; CHECK-NEXT: pxor %xmm1, %xmm1
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; CHECK-NEXT: maxsd %xmm1, %xmm0
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; CHECK-NEXT: ret
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define double @x_ogt(double %x) nounwind {
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%c = fcmp ogt double %x, 0.000000e+00
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%d = select i1 %c, double %x, double 0.000000e+00
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ret double %d
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}
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; CHECK: x_olt:
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; CHECK-NEXT: pxor %xmm1, %xmm1
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; CHECK-NEXT: minsd %xmm1, %xmm0
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; CHECK-NEXT: ret
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define double @x_olt(double %x) nounwind {
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%c = fcmp olt double %x, 0.000000e+00
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%d = select i1 %c, double %x, double 0.000000e+00
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ret double %d
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}
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; CHECK: x_ogt_inverse:
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; CHECK-NEXT: pxor %xmm1, %xmm1
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; CHECK-NEXT: minsd %xmm0, %xmm1
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; CHECK-NEXT: movapd %xmm1, %xmm0
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; CHECK-NEXT: ret
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define double @x_ogt_inverse(double %x) nounwind {
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%c = fcmp ogt double %x, 0.000000e+00
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%d = select i1 %c, double 0.000000e+00, double %x
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ret double %d
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}
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; CHECK: x_olt_inverse:
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; CHECK-NEXT: pxor %xmm1, %xmm1
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; CHECK-NEXT: maxsd %xmm0, %xmm1
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; CHECK-NEXT: movapd %xmm1, %xmm0
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; CHECK-NEXT: ret
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define double @x_olt_inverse(double %x) nounwind {
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%c = fcmp olt double %x, 0.000000e+00
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%d = select i1 %c, double 0.000000e+00, double %x
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ret double %d
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}
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; CHECK: x_oge:
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; CHECK-NEXT: pxor %xmm1, %xmm1
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; CHECK-NEXT: maxsd %xmm1, %xmm0
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; CHECK-NEXT: ret
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define double @x_oge(double %x) nounwind {
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%c = fcmp oge double %x, 0.000000e+00
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%d = select i1 %c, double %x, double 0.000000e+00
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ret double %d
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}
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; CHECK: x_ole:
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; CHECK-NEXT: pxor %xmm1, %xmm1
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; CHECK-NEXT: minsd %xmm1, %xmm0
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; CHECK-NEXT: ret
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define double @x_ole(double %x) nounwind {
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%c = fcmp ole double %x, 0.000000e+00
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%d = select i1 %c, double %x, double 0.000000e+00
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ret double %d
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}
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; CHECK: x_oge_inverse:
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; CHECK-NEXT: pxor %xmm1, %xmm1
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; CHECK-NEXT: minsd %xmm0, %xmm1
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; CHECK-NEXT: movapd %xmm1, %xmm0
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; CHECK-NEXT: ret
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define double @x_oge_inverse(double %x) nounwind {
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%c = fcmp oge double %x, 0.000000e+00
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%d = select i1 %c, double 0.000000e+00, double %x
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ret double %d
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}
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; CHECK: x_ole_inverse:
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; CHECK-NEXT: pxor %xmm1, %xmm1
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; CHECK-NEXT: maxsd %xmm0, %xmm1
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; CHECK-NEXT: movapd %xmm1, %xmm0
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; CHECK-NEXT: ret
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define double @x_ole_inverse(double %x) nounwind {
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%c = fcmp ole double %x, 0.000000e+00
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%d = select i1 %c, double 0.000000e+00, double %x
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ret double %d
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}
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; CHECK: ugt:
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; CHECK-NEXT: ucomisd %xmm0, %xmm1
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define double @ugt(double %x, double %y) nounwind {
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%c = fcmp ugt double %x, %y
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%d = select i1 %c, double %x, double %y
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ret double %d
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}
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; CHECK: ult:
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; CHECK-NEXT: ucomisd %xmm1, %xmm0
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define double @ult(double %x, double %y) nounwind {
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%c = fcmp ult double %x, %y
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%d = select i1 %c, double %x, double %y
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ret double %d
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}
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; CHECK: ugt_inverse:
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; CHECK-NEXT: ucomisd %xmm0, %xmm1
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define double @ugt_inverse(double %x, double %y) nounwind {
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%c = fcmp ugt double %x, %y
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%d = select i1 %c, double %y, double %x
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ret double %d
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}
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; CHECK: ult_inverse:
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; CHECK-NEXT: ucomisd %xmm1, %xmm0
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define double @ult_inverse(double %x, double %y) nounwind {
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%c = fcmp ult double %x, %y
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%d = select i1 %c, double %y, double %x
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ret double %d
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}
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; CHECK: uge:
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; CHECK-NEXT: maxsd %xmm0, %xmm1
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; CHECK-NEXT: movapd %xmm1, %xmm0
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; CHECK-NEXT: ret
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define double @uge(double %x, double %y) nounwind {
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%c = fcmp uge double %x, %y
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%d = select i1 %c, double %x, double %y
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ret double %d
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}
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; CHECK: ule:
|
||||
; CHECK-NEXT: minsd %xmm0, %xmm1
|
||||
; CHECK-NEXT: movapd %xmm1, %xmm0
|
||||
; CHECK-NEXT: ret
|
||||
define double @ule(double %x, double %y) nounwind {
|
||||
%c = fcmp ule double %x, %y
|
||||
%d = select i1 %c, double %x, double %y
|
||||
ret double %d
|
||||
}
|
||||
|
||||
; CHECK: uge_inverse:
|
||||
; CHECK-NEXT: minsd %xmm1, %xmm0
|
||||
; CHECK-NEXT: ret
|
||||
define double @uge_inverse(double %x, double %y) nounwind {
|
||||
%c = fcmp uge double %x, %y
|
||||
%d = select i1 %c, double %y, double %x
|
||||
ret double %d
|
||||
}
|
||||
|
||||
; CHECK: ule_inverse:
|
||||
; CHECK-NEXT: maxsd %xmm1, %xmm0
|
||||
; CHECK-NEXT: ret
|
||||
define double @ule_inverse(double %x, double %y) nounwind {
|
||||
%c = fcmp ule double %x, %y
|
||||
%d = select i1 %c, double %y, double %x
|
||||
ret double %d
|
||||
}
|
||||
|
||||
; CHECK: x_ugt:
|
||||
; CHECK-NEXT: pxor %xmm1, %xmm1
|
||||
; CHECK-NEXT: maxsd %xmm0, %xmm1
|
||||
; CHECK-NEXT: movapd %xmm1, %xmm0
|
||||
; CHECK-NEXT: ret
|
||||
define double @x_ugt(double %x) nounwind {
|
||||
%c = fcmp ugt double %x, 0.000000e+00
|
||||
%d = select i1 %c, double %x, double 0.000000e+00
|
||||
ret double %d
|
||||
}
|
||||
|
||||
; CHECK: x_ult:
|
||||
; CHECK-NEXT: pxor %xmm1, %xmm1
|
||||
; CHECK-NEXT: minsd %xmm0, %xmm1
|
||||
; CHECK-NEXT: movapd %xmm1, %xmm0
|
||||
; CHECK-NEXT: ret
|
||||
define double @x_ult(double %x) nounwind {
|
||||
%c = fcmp ult double %x, 0.000000e+00
|
||||
%d = select i1 %c, double %x, double 0.000000e+00
|
||||
ret double %d
|
||||
}
|
||||
|
||||
; CHECK: x_ugt_inverse:
|
||||
; CHECK-NEXT: pxor %xmm1, %xmm1
|
||||
; CHECK-NEXT: minsd %xmm1, %xmm0
|
||||
; CHECK-NEXT: ret
|
||||
define double @x_ugt_inverse(double %x) nounwind {
|
||||
%c = fcmp ugt double %x, 0.000000e+00
|
||||
%d = select i1 %c, double 0.000000e+00, double %x
|
||||
ret double %d
|
||||
}
|
||||
|
||||
; CHECK: x_ult_inverse:
|
||||
; CHECK-NEXT: pxor %xmm1, %xmm1
|
||||
; CHECK-NEXT: maxsd %xmm1, %xmm0
|
||||
; CHECK-NEXT: ret
|
||||
define double @x_ult_inverse(double %x) nounwind {
|
||||
%c = fcmp ult double %x, 0.000000e+00
|
||||
%d = select i1 %c, double 0.000000e+00, double %x
|
||||
ret double %d
|
||||
}
|
||||
|
||||
; CHECK: x_uge:
|
||||
; CHECK-NEXT: pxor %xmm1, %xmm1
|
||||
; CHECK-NEXT: maxsd %xmm0, %xmm1
|
||||
; CHECK-NEXT: movapd %xmm1, %xmm0
|
||||
; CHECK-NEXT: ret
|
||||
define double @x_uge(double %x) nounwind {
|
||||
%c = fcmp uge double %x, 0.000000e+00
|
||||
%d = select i1 %c, double %x, double 0.000000e+00
|
||||
ret double %d
|
||||
}
|
||||
|
||||
; CHECK: x_ule:
|
||||
; CHECK-NEXT: pxor %xmm1, %xmm1
|
||||
; CHECK-NEXT: minsd %xmm0, %xmm1
|
||||
; CHECK-NEXT: movapd %xmm1, %xmm0
|
||||
; CHECK-NEXT: ret
|
||||
define double @x_ule(double %x) nounwind {
|
||||
%c = fcmp ule double %x, 0.000000e+00
|
||||
%d = select i1 %c, double %x, double 0.000000e+00
|
||||
ret double %d
|
||||
}
|
||||
|
||||
; CHECK: x_uge_inverse:
|
||||
; CHECK-NEXT: pxor %xmm1, %xmm1
|
||||
; CHECK-NEXT: minsd %xmm1, %xmm0
|
||||
; CHECK-NEXT: ret
|
||||
define double @x_uge_inverse(double %x) nounwind {
|
||||
%c = fcmp uge double %x, 0.000000e+00
|
||||
%d = select i1 %c, double 0.000000e+00, double %x
|
||||
ret double %d
|
||||
}
|
||||
|
||||
; CHECK: x_ule_inverse:
|
||||
; CHECK-NEXT: pxor %xmm1, %xmm1
|
||||
; CHECK-NEXT: maxsd %xmm1, %xmm0
|
||||
; CHECK-NEXT: ret
|
||||
define double @x_ule_inverse(double %x) nounwind {
|
||||
%c = fcmp ule double %x, 0.000000e+00
|
||||
%d = select i1 %c, double 0.000000e+00, double %x
|
||||
ret double %d
|
||||
}
|
||||
|
||||
; Test a few more misc. cases.
|
||||
|
||||
; CHECK: clampTo3k_a:
|
||||
; CHECK: minsd
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user