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Thumb2 assembly parsing and encoding for UHASX/UHSAX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140088 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -4954,6 +4954,10 @@ def : MnemonicAlias<"shsubaddx", "shsax">;
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def : MnemonicAlias<"ssubaddx", "ssax">;
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// UASX == UADDSUBX
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def : MnemonicAlias<"uaddsubx", "uasx">;
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// UHASX == UHADDSUBX
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def : MnemonicAlias<"uhaddsubx", "uhasx">;
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// UHSAX == UHSUBADDX
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def : MnemonicAlias<"uhsubaddx", "uhsax">;
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// LDRSBT/LDRHT/LDRSHT post-index offset if optional.
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// Note that the write-back output register is a dummy operand for MC (it's
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@ -2732,3 +2732,29 @@ _func:
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@ CHECK: itt gt @ encoding: [0xc4,0xbf]
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@ CHECK: uhadd16gt r4, r8, r2 @ encoding: [0x98,0xfa,0x62,0xf4]
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@ CHECK: uhadd8gt r4, r8, r2 @ encoding: [0x88,0xfa,0x62,0xf4]
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@------------------------------------------------------------------------------
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@ UHASX/UHSAX
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@------------------------------------------------------------------------------
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uhasx r4, r1, r5
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uhsax r5, r6, r6
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itt gt
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uhasxgt r6, r9, r8
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uhsaxgt r7, r8, r12
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uhaddsubx r4, r1, r5
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uhsubaddx r5, r6, r6
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itt gt
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uhaddsubxgt r6, r9, r8
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uhsubaddxgt r7, r8, r12
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@ CHECK: uhasx r4, r1, r5 @ encoding: [0xa1,0xfa,0x65,0xf4]
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@ CHECK: uhsax r5, r6, r6 @ encoding: [0xe6,0xfa,0x66,0xf5]
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@ CHECK: itt gt @ encoding: [0xc4,0xbf]
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@ CHECK: uhasxgt r6, r9, r8 @ encoding: [0xa9,0xfa,0x68,0xf6]
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@ CHECK: uhsaxgt r7, r8, r12 @ encoding: [0xe8,0xfa,0x6c,0xf7]
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@ CHECK: uhasx r4, r1, r5 @ encoding: [0xa1,0xfa,0x65,0xf4]
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@ CHECK: uhsax r5, r6, r6 @ encoding: [0xe6,0xfa,0x66,0xf5]
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@ CHECK: itt gt @ encoding: [0xc4,0xbf]
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@ CHECK: uhasxgt r6, r9, r8 @ encoding: [0xa9,0xfa,0x68,0xf6]
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@ CHECK: uhsaxgt r7, r8, r12 @ encoding: [0xe8,0xfa,0x6c,0xf7]
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